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olivier.gi |
#!/bin/bash
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#------------------------------------------------------------------------------
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# Copyright (C) 2001 Authors
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#
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# This source file may be used and distributed without restriction provided
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# that this copyright statement is not removed from the file and that any
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# derivative work contains the original copyright notice and the associated
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# disclaimer.
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#
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# This source file is free software; you can redistribute it and/or modify
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# it under the terms of the GNU Lesser General Public License as published
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# by the Free Software Foundation; either version 2.1 of the License, or
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# (at your option) any later version.
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#
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# This source is distributed in the hope that it will be useful, but WITHOUT
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# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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# FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
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# License for more details.
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#
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# You should have received a copy of the GNU Lesser General Public License
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# along with this source; if not, write to the Free Software Foundation,
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# Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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#
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#------------------------------------------------------------------------------
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#
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# File Name: msp430sim
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#
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# Author(s):
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# - Olivier Girard, olgirard@gmail.com
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#
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#------------------------------------------------------------------------------
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# $Rev: 73 $
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# $LastChangedBy: olivier.girard $
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# $LastChangedDate: 2010-08-03 21:26:39 +0200 (Tue, 03 Aug 2010) $
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#------------------------------------------------------------------------------
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###############################################################################
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# Parameter Check #
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###############################################################################
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EXPECTED_ARGS=1
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if [ $# -ne $EXPECTED_ARGS ]; then
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echo "ERROR : wrong number of arguments"
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echo "USAGE : msp430sim "
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echo "Example : msp430sim leds"
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echo ""
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echo "In order to switch the verilog simulator, the OMSP_SIMULATOR environment"
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echo "variable can be set to the following values:"
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echo ""
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echo " - iverilog : Icarus Verilog (default)"
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echo " - cver : CVer"
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echo " - verilog : Verilog-XL"
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echo " - ncverilog : NC-Verilog"
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echo " - vcs : VCS"
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echo " - vsim : Modelsim"
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echo " - isim : Xilinx simulator"
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echo ""
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exit 1
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fi
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###############################################################################
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# Check if the required files exist #
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###############################################################################
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softdir=../../../software/apps/$1;
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elffile=../../../software/apps/$1/$1.elf;
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verfile=../src/$1.v;
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submitfile=../src/submit.f;
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if [ $OMSP_SIMULATOR == "isim" ]; then
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submitfile=../src/submit.prj;
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fi
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incfile=../../../rtl/verilog/openmsp430/openMSP430_defines.v;
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if [ ! -e $softdir ]; then
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echo "Software directory doesn't exist: $softdir"
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exit 1
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fi
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if [ ! -e $verfile ]; then
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echo "Verilog stimulus file $verfile doesn't exist: $verfile"
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exit 1
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fi
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if [ ! -e $submitfile ]; then
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echo "Verilog submit file $submitfile doesn't exist: $submitfile"
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exit 1
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fi
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###############################################################################
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# Cleanup #
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###############################################################################
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echo "Cleanup..."
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rm -rf *.vcd
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rm -rf *.vpd
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rm -rf *.trn
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rm -rf *.dsn
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rm -rf pmem.*
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rm -rf stimulus.v
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###############################################################################
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# Run simulation #
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###############################################################################
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echo " ======================================================="
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echo "| Start simulation: $1"
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echo " ======================================================="
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# Make local copy of the openMSP403 configuration file
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# and prepare it for MSPGCC preprocessing
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cp $incfile ./pmem.h
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sed -ie 's/`ifdef/#ifdef/g' ./pmem.h
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sed -ie 's/`else/#else/g' ./pmem.h
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sed -ie 's/`endif/#endif/g' ./pmem.h
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sed -ie 's/`define/#define/g' ./pmem.h
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sed -ie 's/`include/\/\/#include/g' ./pmem.h
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sed -ie 's/`//g' ./pmem.h
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sed -ie "s/'//g" ./pmem.h
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# Use MSPGCC preprocessor to extract the Program, Data
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# and Peripheral memory sizes
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if command -v msp430-elf-gcc >/dev/null; then
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msp430-elf-gcc -E -P -x c ../bin/omsp_config.sh > pmem.sh
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else
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msp430-gcc -E -P -x c ../bin/omsp_config.sh > pmem.sh
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fi
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# Source the extracted configuration file
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if [[ $(uname -s) == CYGWIN* ]];
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then
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dos2unix pmem.sh
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fi
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source pmem.sh
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# Make C program
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cd $softdir
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make clean
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make
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cd ../../../sim/rtl_sim/run/
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# Create links
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if [[ $(uname -s) == CYGWIN* ]];
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then
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cp $elffile pmem.elf
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cp $verfile stimulus.v
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else
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ln -s $elffile pmem.elf
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ln -s $verfile stimulus.v
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fi
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# Create IHEX file from ELF
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echo "Convert ELF file to IHEX format..."
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if command -v msp430-elf-objcopy >/dev/null; then
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msp430-elf-objcopy -O ihex pmem.elf pmem.ihex
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else
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msp430-objcopy -O ihex pmem.elf pmem.ihex
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fi
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# Generate Program memory file
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echo "Convert IHEX file to Verilog MEMH format..."
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../bin/ihex2mem.tcl -ihex pmem.ihex -out pmem.mem -mem_size $pmemsize
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echo "Convert IHEX file to Altera MIF format..."
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../bin/ihex2mif.tcl -ihex pmem.ihex -out pmem.mif -mem_size $pmemsize
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# Start verilog simulation
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echo "Start Verilog simulation..."
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../bin/rtlsim.sh stimulus.v pmem.mem $submitfile
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