URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [fpga/] [xilinx_avnet_lx9microbard/] [rtl/] [verilog/] [coregen/] [summary.log] - Blame information for rev 158

Line No.	Rev	Author	Line
1	157	olivier.gi
2			`User Configuration`
3			`-------------------------------------`
4			`Algorithm : Minimum_Area`
5			`Memory Type : Single_Port_RAM`
6			`Port A Read Width : 16`
7			`Port A Write Width : 16`
8			`Memory Depth : 2048`
9			`--------------------------------------------------------------`
10
11			`Block RAM resource(s) (9K BRAMs) : 0`
12			`Block RAM resource(s) (18K BRAMs) : 2`
13			`--------------------------------------------------------------`
14			`Clock A Frequency : 100`
15			`Port A Enable Rate : 100`
16			`Port A Write Rate : 50`
17			`----------------------------------------------------------`
18			`Estimated Power for IP : 6.192928 mW`
19			`----------------------------------------------------------`