OpenCores
URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [fpga/] [xilinx_avnet_lx9microbard/] [rtl/] [verilog/] [io_mux.v] - Blame information for rev 199

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 157 olivier.gi
//----------------------------------------------------------------------------
2
// Copyright (C) 2001 Authors
3
//
4
// This source file may be used and distributed without restriction provided
5
// that this copyright statement is not removed from the file and that any
6
// derivative work contains the original copyright notice and the associated
7
// disclaimer.
8
//
9
// This source file is free software; you can redistribute it and/or modify
10
// it under the terms of the GNU Lesser General Public License as published
11
// by the Free Software Foundation; either version 2.1 of the License, or
12
// (at your option) any later version.
13
//
14
// This source is distributed in the hope that it will be useful, but WITHOUT
15
// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
17
// License for more details.
18
//
19
// You should have received a copy of the GNU Lesser General Public License
20
// along with this source; if not, write to the Free Software Foundation,
21
// Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA
22
//
23
//----------------------------------------------------------------------------
24
//
25
// *File Name: io_mux.v
26
// 
27
// *Module Description:
28
//                      I/O mux for port function selection.
29
//
30
// *Author(s):
31
//              - Olivier Girard,    olgirard@gmail.com
32
//
33
//----------------------------------------------------------------------------
34
// $Rev: 104 $
35
// $LastChangedBy: olivier.girard $
36
// $LastChangedDate: 2011-03-06 21:02:27 +0100 (Sun, 06 Mar 2011) $
37
//----------------------------------------------------------------------------
38
 
39
module  io_mux (
40
 
41
// Function A (typically GPIO)
42
    a_din,
43
    a_dout,
44
    a_dout_en,
45
 
46
// Function B (Timer A, ...)
47
    b_din,
48
    b_dout,
49
    b_dout_en,
50
 
51
// IO Cell
52
    io_din,
53
    io_dout,
54
    io_dout_en,
55
 
56
// Function selection (0=A, 1=B)
57
    sel
58
);
59
 
60
// PARAMETERs
61
//============
62
parameter          WIDTH = 8;
63
 
64
// Function A (typically GPIO)
65
//===============================
66
output [WIDTH-1:0] a_din;
67
input  [WIDTH-1:0] a_dout;
68
input  [WIDTH-1:0] a_dout_en;
69
 
70
// Function B (Timer A, ...)
71
//===============================
72
output [WIDTH-1:0] b_din;
73
input  [WIDTH-1:0] b_dout;
74
input  [WIDTH-1:0] b_dout_en;
75
 
76
// IO Cell
77
//===============================
78
input  [WIDTH-1:0] io_din;
79
output [WIDTH-1:0] io_dout;
80
output [WIDTH-1:0] io_dout_en;
81
 
82
// Function selection (0=A, 1=B)
83
//===============================
84
input  [WIDTH-1:0] sel;
85
 
86
 
87
//=============================================================================
88
// 1)  I/O FUNCTION SELECTION MUX
89
//=============================================================================
90
 
91
function [WIDTH-1:0] mux (
92
   input [WIDTH-1:0] A,
93
   input [WIDTH-1:0] B,
94
   input [WIDTH-1:0] SEL
95
);
96
   integer i;
97
   begin
98
      mux = {WIDTH{1'b0}};
99
      for (i = 0; i < WIDTH; i = i + 1)
100
        mux[i] = sel[i] ? B[i] : A[i];
101
   end
102
endfunction
103
 
104
 
105
assign a_din      = mux(       io_din, {WIDTH{1'b0}}, sel);
106
assign b_din      = mux({WIDTH{1'b0}},        io_din, sel);
107
assign io_dout    = mux(       a_dout,        b_dout, sel);
108
assign io_dout_en = mux(    a_dout_en,     b_dout_en, sel);
109
 
110
 
111
endmodule // io_mux

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.