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[/] [openmsp430/] [trunk/] [fpga/] [xilinx_avnet_lx9microbard/] [sim/] [rtl_sim/] [bin/] [rtlsim.sh] - Blame information for rev 202

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Line No. Rev Author Line
1 157 olivier.gi
#!/bin/bash
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#------------------------------------------------------------------------------
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# Copyright (C) 2001 Authors
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#
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# This source file may be used and distributed without restriction provided
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# that this copyright statement is not removed from the file and that any
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# derivative work contains the original copyright notice and the associated
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# disclaimer.
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#
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# This source file is free software; you can redistribute it and/or modify
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# it under the terms of the GNU Lesser General Public License as published
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# by the Free Software Foundation; either version 2.1 of the License, or
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# (at your option) any later version.
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#
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# This source is distributed in the hope that it will be useful, but WITHOUT
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# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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# FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
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# License for more details.
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#
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# You should have received a copy of the GNU Lesser General Public License
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# along with this source; if not, write to the Free Software Foundation,
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# Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA
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#
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#------------------------------------------------------------------------------
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#
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# File Name: rtlsim.sh
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#
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# Author(s):
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#             - Olivier Girard,    olgirard@gmail.com
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#             - Mihai M.,          mmihai@delajii.net
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#
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#------------------------------------------------------------------------------
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# $Rev: 138 $
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# $LastChangedBy: olivier.girard $
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# $LastChangedDate: 2012-04-23 13:10:00 +0200 (Mon, 23 Apr 2012) $
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#------------------------------------------------------------------------------
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###############################################################################
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#                            Parameter Check                                  #
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###############################################################################
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EXPECTED_ARGS=3
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if [ $# -ne $EXPECTED_ARGS ]; then
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  echo "ERROR    : wrong number of arguments"
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  echo "USAGE    : rtlsim.sh <verilog stimulus file> <memory file> <submit file>"
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  echo "Example  : rtlsim.sh ./stimulus.v            pmem.mem      ../src/submit.f"
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  echo "OMSP_SIMULATOR env keeps simulator name iverilog/cver/verilog/ncverilog/vsim/vcs"
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  exit 1
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fi
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###############################################################################
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#                     Check if the required files exist                       #
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###############################################################################
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if [ ! -e $1 ]; then
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    echo "Verilog stimulus file $1 doesn't exist"
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    exit 1
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fi
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if [ ! -e $2 ]; then
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    echo "Memory file $2 doesn't exist"
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    exit 1
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fi
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if [ ! -e $3 ]; then
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    echo "Verilog submit file $3 doesn't exist"
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    exit 1
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fi
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###############################################################################
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#                         Start verilog simulation                            #
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###############################################################################
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if [ "${OMSP_SIMULATOR:-iverilog}" = iverilog ]; then
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    rm -rf simv
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    NODUMP=${OMSP_NODUMP-0}
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    if [ $NODUMP -eq 1 ]
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      then
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        iverilog -o simv -c $3 -D NODUMP
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      else
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        iverilog -o simv -c $3
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    fi
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    if [ `uname -o` = "Cygwin" ]
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      then
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            vvp.exe ./simv
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      else
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        ./simv
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    fi
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else
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    NODUMP=${OMSP_NODUMP-0}
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    if [ $NODUMP -eq 1 ] ; then
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       vargs="+define+NODUMP"
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    else
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       vargs=""
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    fi
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   case $OMSP_SIMULATOR in
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    cver* )
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       vargs="$vargs +define+VXL +define+CVER" ;;
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    verilog* )
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       vargs="$vargs +define+VXL" ;;
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    ncverilog* )
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       rm -rf INCA_libs
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       vargs="$vargs +access+r +nclicq +ncinput+../bin/cov_ncverilog.tcl -covdut openMSP430 -covfile ../bin/cov_ncverilog.ccf -coverage all +define+TRN_FILE" ;;
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    vcs* )
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       rm -rf csrc simv*
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       vargs="$vargs -R -debug_pp +vcs+lic+wait +v2k +define+VPD_FILE" ;;
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    vsim* )
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       # Modelsim
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       if [ -d work ]; then  vdel -all; fi
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       vlib work
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       exec vlog +acc=prn -f $3 $vargs -R -c -do "run -all" ;;
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    isim )
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       # Xilinx simulator
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       rm -rf fuse* isim*
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       fuse tb_openMSP430_fpga glbl -mt off -v 1 -prj $3 -o isim.exe -i ../../../bench/verilog/ -i ../../../rtl/verilog/openmsp430/ -i ../../../rtl/verilog/openmsp430/periph/
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       echo "run all" > isim.tcl
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       ./isim.exe -tclbatch isim.tcl
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       exit
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   esac
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   echo "Running: $OMSP_SIMULATOR -f $3 $vargs"
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   exec $OMSP_SIMULATOR -f $3 $vargs
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fi

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