| 1 |
157 |
olivier.gi |
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| 2 |
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verilog work ../../../bench/verilog/tb_openMSP430_fpga.v
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| 3 |
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verilog work ../../../bench/verilog/msp_debug.v
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| 4 |
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verilog work ../../../bench/verilog/glbl.v
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| 5 |
167 |
olivier.gi |
verilog work ../../../bench/verilog/ram_16x8k_dp.v
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| 6 |
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verilog work ../../../bench/verilog/ram_16x1k_dp.v
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| 7 |
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verilog work ../../../bench/verilog/ram_dp.v
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| 8 |
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verilog work ../../../bench/verilog/ram_16x1k_sp.v
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| 9 |
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verilog work ../../../bench/verilog/ram_sp.v
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| 10 |
157 |
olivier.gi |
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| 11 |
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verilog work /opt/Xilinx/14.2/ISE_DS/ISE/verilog/src/unisims/DCM_SP.v
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| 12 |
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verilog work /opt/Xilinx/14.2/ISE_DS/ISE/verilog/src/unisims/IBUF.v
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| 13 |
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verilog work /opt/Xilinx/14.2/ISE_DS/ISE/verilog/src/unisims/IBUFG.v
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| 14 |
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verilog work /opt/Xilinx/14.2/ISE_DS/ISE/verilog/src/unisims/BUFG.v
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| 15 |
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verilog work /opt/Xilinx/14.2/ISE_DS/ISE/verilog/src/unisims/OBUF.v
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| 16 |
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verilog work /opt/Xilinx/14.2/ISE_DS/ISE/verilog/src/unisims/IOBUF.v
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| 17 |
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| 18 |
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verilog work ../../../rtl/verilog/openMSP430_fpga.v
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| 19 |
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verilog work ../../../rtl/verilog/omsp_system_0.v
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| 20 |
167 |
olivier.gi |
verilog work ../../../rtl/verilog/omsp_system_1.v
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| 21 |
157 |
olivier.gi |
verilog work ../../../rtl/verilog/io_mux.v
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| 22 |
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verilog work ../../../rtl/verilog/omsp_uart.v
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| 23 |
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| 24 |
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verilog work ../../../rtl/verilog/openmsp430/openMSP430.v
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| 25 |
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verilog work ../../../rtl/verilog/openmsp430/omsp_frontend.v
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| 26 |
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verilog work ../../../rtl/verilog/openmsp430/omsp_execution_unit.v
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| 27 |
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verilog work ../../../rtl/verilog/openmsp430/omsp_register_file.v
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| 28 |
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verilog work ../../../rtl/verilog/openmsp430/omsp_alu.v
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| 29 |
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verilog work ../../../rtl/verilog/openmsp430/omsp_sfr.v
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| 30 |
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verilog work ../../../rtl/verilog/openmsp430/omsp_mem_backbone.v
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| 31 |
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verilog work ../../../rtl/verilog/openmsp430/omsp_clock_module.v
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| 32 |
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verilog work ../../../rtl/verilog/openmsp430/omsp_dbg.v
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| 33 |
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verilog work ../../../rtl/verilog/openmsp430/omsp_dbg_hwbrk.v
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| 34 |
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verilog work ../../../rtl/verilog/openmsp430/omsp_dbg_uart.v
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| 35 |
162 |
olivier.gi |
verilog work ../../../rtl/verilog/openmsp430/omsp_dbg_i2c.v
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| 36 |
157 |
olivier.gi |
verilog work ../../../rtl/verilog/openmsp430/omsp_watchdog.v
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| 37 |
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verilog work ../../../rtl/verilog/openmsp430/omsp_multiplier.v
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| 38 |
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verilog work ../../../rtl/verilog/openmsp430/omsp_sync_reset.v
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| 39 |
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verilog work ../../../rtl/verilog/openmsp430/omsp_sync_cell.v
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| 40 |
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verilog work ../../../rtl/verilog/openmsp430/omsp_scan_mux.v
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| 41 |
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verilog work ../../../rtl/verilog/openmsp430/omsp_and_gate.v
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| 42 |
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verilog work ../../../rtl/verilog/openmsp430/omsp_wakeup_cell.v
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| 43 |
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verilog work ../../../rtl/verilog/openmsp430/omsp_clock_gate.v
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| 44 |
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verilog work ../../../rtl/verilog/openmsp430/omsp_clock_mux.v
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| 45 |
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verilog work ../../../rtl/verilog/openmsp430/periph/omsp_gpio.v
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| 46 |
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verilog work ../../../rtl/verilog/openmsp430/periph/omsp_timerA.v
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| 47 |
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