| 1 |
157 |
olivier.gi |
|
| 2 |
|
|
verilog work ../../../bench/verilog/tb_openMSP430_fpga.v
|
| 3 |
|
|
verilog work ../../../bench/verilog/msp_debug.v
|
| 4 |
|
|
verilog work ../../../bench/verilog/glbl.v
|
| 5 |
167 |
olivier.gi |
verilog work ../../../bench/verilog/ram_16x8k_dp.v
|
| 6 |
|
|
verilog work ../../../bench/verilog/ram_16x1k_dp.v
|
| 7 |
|
|
verilog work ../../../bench/verilog/ram_dp.v
|
| 8 |
|
|
verilog work ../../../bench/verilog/ram_16x1k_sp.v
|
| 9 |
|
|
verilog work ../../../bench/verilog/ram_sp.v
|
| 10 |
157 |
olivier.gi |
|
| 11 |
212 |
olivier.gi |
verilog work /cad/Xilinx/14.7/ISE_DS/ISE/verilog/src/unisims/DCM_SP.v
|
| 12 |
|
|
verilog work /cad/Xilinx/14.7/ISE_DS/ISE/verilog/src/unisims/IBUF.v
|
| 13 |
|
|
verilog work /cad/Xilinx/14.7/ISE_DS/ISE/verilog/src/unisims/IBUFG.v
|
| 14 |
|
|
verilog work /cad/Xilinx/14.7/ISE_DS/ISE/verilog/src/unisims/BUFG.v
|
| 15 |
|
|
verilog work /cad/Xilinx/14.7/ISE_DS/ISE/verilog/src/unisims/OBUF.v
|
| 16 |
|
|
verilog work /cad/Xilinx/14.7/ISE_DS/ISE/verilog/src/unisims/IOBUF.v
|
| 17 |
157 |
olivier.gi |
|
| 18 |
|
|
verilog work ../../../rtl/verilog/openMSP430_fpga.v
|
| 19 |
|
|
verilog work ../../../rtl/verilog/omsp_system_0.v
|
| 20 |
167 |
olivier.gi |
verilog work ../../../rtl/verilog/omsp_system_1.v
|
| 21 |
157 |
olivier.gi |
verilog work ../../../rtl/verilog/io_mux.v
|
| 22 |
|
|
verilog work ../../../rtl/verilog/omsp_uart.v
|
| 23 |
|
|
|
| 24 |
|
|
verilog work ../../../rtl/verilog/openmsp430/openMSP430.v
|
| 25 |
|
|
verilog work ../../../rtl/verilog/openmsp430/omsp_frontend.v
|
| 26 |
|
|
verilog work ../../../rtl/verilog/openmsp430/omsp_execution_unit.v
|
| 27 |
|
|
verilog work ../../../rtl/verilog/openmsp430/omsp_register_file.v
|
| 28 |
|
|
verilog work ../../../rtl/verilog/openmsp430/omsp_alu.v
|
| 29 |
|
|
verilog work ../../../rtl/verilog/openmsp430/omsp_sfr.v
|
| 30 |
|
|
verilog work ../../../rtl/verilog/openmsp430/omsp_mem_backbone.v
|
| 31 |
|
|
verilog work ../../../rtl/verilog/openmsp430/omsp_clock_module.v
|
| 32 |
|
|
verilog work ../../../rtl/verilog/openmsp430/omsp_dbg.v
|
| 33 |
|
|
verilog work ../../../rtl/verilog/openmsp430/omsp_dbg_hwbrk.v
|
| 34 |
|
|
verilog work ../../../rtl/verilog/openmsp430/omsp_dbg_uart.v
|
| 35 |
162 |
olivier.gi |
verilog work ../../../rtl/verilog/openmsp430/omsp_dbg_i2c.v
|
| 36 |
157 |
olivier.gi |
verilog work ../../../rtl/verilog/openmsp430/omsp_watchdog.v
|
| 37 |
|
|
verilog work ../../../rtl/verilog/openmsp430/omsp_multiplier.v
|
| 38 |
|
|
verilog work ../../../rtl/verilog/openmsp430/omsp_sync_reset.v
|
| 39 |
|
|
verilog work ../../../rtl/verilog/openmsp430/omsp_sync_cell.v
|
| 40 |
|
|
verilog work ../../../rtl/verilog/openmsp430/omsp_scan_mux.v
|
| 41 |
|
|
verilog work ../../../rtl/verilog/openmsp430/omsp_and_gate.v
|
| 42 |
|
|
verilog work ../../../rtl/verilog/openmsp430/omsp_wakeup_cell.v
|
| 43 |
|
|
verilog work ../../../rtl/verilog/openmsp430/omsp_clock_gate.v
|
| 44 |
|
|
verilog work ../../../rtl/verilog/openmsp430/omsp_clock_mux.v
|
| 45 |
|
|
verilog work ../../../rtl/verilog/openmsp430/periph/omsp_gpio.v
|
| 46 |
|
|
verilog work ../../../rtl/verilog/openmsp430/periph/omsp_timerA.v
|
