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Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [fpga/] [xilinx_diligent_s3board/] [rtl/] [verilog/] [coregen/] [ram_8x512_hi.asy] - Blame information for rev 111

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Line No. Rev Author Line
1 2 olivier.gi 
Version 4
2 
SymbolType BLOCK
3 
RECTANGLE Normal 32 0 320 272
4 
PIN 0 48  LEFT 36
5 
PINATTR PinName addr[8:0]
6 
PINATTR Polarity IN
7 
LINE Wide 0 48 32 48
8 
PIN 0 80  LEFT 36
9 
PINATTR PinName din[7:0]
10 
PINATTR Polarity IN
11 
LINE Wide 0 80 32 80
12 
PIN 0 112  LEFT 36
13 
PINATTR PinName we
14 
PINATTR Polarity IN
15 
LINE Normal 0 112 32 112
16 
PIN 0 144  LEFT 36
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PINATTR PinName en
18 
PINATTR Polarity IN
19 
LINE Normal 0 144 32 144
20 
PIN 0 240  LEFT 36
21 
PINATTR PinName clk
22 
PINATTR Polarity IN
23 
LINE Normal 0 240 32 240
24 
PIN 352 48  RIGHT 36
25 
PINATTR PinName dout[7:0]
26 
PINATTR Polarity OUT
27 
LINE Wide 320 48 352 48

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