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Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [fpga/] [xilinx_diligent_s3board/] [rtl/] [verilog/] [coregen/] [ram_8x512_hi_flist.txt] - Blame information for rev 28

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# Output products list for 
ram_8x512_hi.asy
ram_8x512_hi.ngc
ram_8x512_hi.sym
ram_8x512_hi.v
ram_8x512_hi.veo
ram_8x512_hi.xco
ram_8x512_hi_flist.txt
ram_8x512_hi_xmdf.tcl

Line No.	Rev	Author	Line
1	2	olivier.gi	`# Output products list for`
2			`ram_8x512_hi.asy`
3			`ram_8x512_hi.ngc`
4			`ram_8x512_hi.sym`
5			`ram_8x512_hi.v`
6			`ram_8x512_hi.veo`
7			`ram_8x512_hi.xco`
8			`ram_8x512_hi_flist.txt`
9			`ram_8x512_hi_xmdf.tcl`

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Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [fpga/] [xilinx_diligent_s3board/] [rtl/] [verilog/] [coregen/] [ram_8x512_hi_flist.txt] - Blame information for rev 28