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//----------------------------------------------------------------------------
// Copyright (C) 2001 Authors
//
// This source file may be used and distributed without restriction provided
// that this copyright statement is not removed from the file and that any
// derivative work contains the original copyright notice and the associated
// disclaimer.
//
// This source file is free software; you can redistribute it and/or modify
// it under the terms of the GNU Lesser General Public License as published
// by the Free Software Foundation; either version 2.1 of the License, or
// (at your option) any later version.
//
// This source is distributed in the hope that it will be useful, but WITHOUT
// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
// License for more details.
//
// You should have received a copy of the GNU Lesser General Public License
// along with this source; if not, write to the Free Software Foundation,
// Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA
//
//----------------------------------------------------------------------------
// 
// *File Name: openMSP430_defines.v
// 
// *Module Description:
//                      openMSP430 Configuration file
//
// *Author(s):
//              - Olivier Girard,    olgirard@gmail.com
//
//----------------------------------------------------------------------------
// $Rev: 109 $
// $LastChangedBy: olivier.girard $
// $LastChangedDate: 2011-03-27 13:49:47 +0200 (Sun, 27 Mar 2011) $
//----------------------------------------------------------------------------
//`define OMSP_NO_INCLUDE
`ifdef OMSP_NO_INCLUDE
`else
`include "openMSP430_undefines.v"
`endif
 
//----------------------------------------------------------------------------
// SYSTEM CONFIGURATION
//----------------------------------------------------------------------------
//
// Note: the sum of both program and data memories should not exceed 63.5 kB
//
 
// Program Memory Size:
//                     Uncomment the required memory size
//-------------------------------------------------------
//`define PMEM_SIZE_59_KB
//`define PMEM_SIZE_55_KB
//`define PMEM_SIZE_54_KB
//`define PMEM_SIZE_51_KB
//`define PMEM_SIZE_48_KB
//`define PMEM_SIZE_41_KB
//`define PMEM_SIZE_32_KB
//`define PMEM_SIZE_24_KB
//`define PMEM_SIZE_16_KB
//`define PMEM_SIZE_12_KB
//`define PMEM_SIZE_8_KB
`define PMEM_SIZE_4_KB
//`define PMEM_SIZE_2_KB
//`define PMEM_SIZE_1_KB
 
// Data Memory Size:
//                     Uncomment the required memory size
//-------------------------------------------------------
//`define DMEM_SIZE_32_KB
//`define DMEM_SIZE_24_KB
//`define DMEM_SIZE_16_KB
//`define DMEM_SIZE_10_KB
//`define DMEM_SIZE_8_KB
//`define DMEM_SIZE_5_KB
//`define DMEM_SIZE_4_KB
//`define DMEM_SIZE_2p5_KB
//`define DMEM_SIZE_2_KB
`define DMEM_SIZE_1_KB
//`define DMEM_SIZE_512_B
//`define DMEM_SIZE_256_B
//`define DMEM_SIZE_128_B
 
 
// Include/Exclude Hardware Multiplier
`define MULTIPLIER
 
 
//----------------------------------------------------------------------------
// REMOTE DEBUGGING INTERFACE CONFIGURATION
//----------------------------------------------------------------------------
 
// Include Debug interface
`define DBG_EN
 
// Debug interface selection
//             `define DBG_UART -> Enable UART (8N1) debug interface
//             `define DBG_JTAG -> DON'T UNCOMMENT, NOT SUPPORTED
//
`define DBG_UART
//`define DBG_JTAG
 
// Number of hardware breakpoints (each unit contains 2 hw address breakpoints)
//             `define DBG_HWBRK_0 -> Include hardware breakpoints unit 0
//             `define DBG_HWBRK_1 -> Include hardware breakpoints unit 1
//             `define DBG_HWBRK_2 -> Include hardware breakpoints unit 2
//             `define DBG_HWBRK_3 -> Include hardware breakpoints unit 3
//
`define  DBG_HWBRK_0
//`define  DBG_HWBRK_1
//`define  DBG_HWBRK_2
//`define  DBG_HWBRK_3
 
 
// Defines the debugger CPU_CTL.RST_BRK_EN reset value (CPU break on PUC reset)
//
// When defined, this concretely bring the CPU to break after a PUC
// occurrence by default. This is typically usefull when the program
// memory can only be initialized through the serial debug interface.
//
//`define DBG_RST_BRK_EN
 
 
//==========================================================================//
//==========================================================================//
//==========================================================================//
//==========================================================================//
//=====        SYSTEM CONSTANTS --- !!!!!!!! DO NOT EDIT !!!!!!!!      =====//
//==========================================================================//
//==========================================================================//
//==========================================================================//
//==========================================================================//
 
//
// PROGRAM & DATA MEMORY CONFIGURATION
//======================================
 
// Program Memory Size
`ifdef PMEM_SIZE_59_KB
  `define PMEM_AWIDTH      15
  `define PMEM_SIZE     60416
`endif
`ifdef PMEM_SIZE_55_KB
  `define PMEM_AWIDTH      15
  `define PMEM_SIZE     56320
`endif
`ifdef PMEM_SIZE_54_KB
  `define PMEM_AWIDTH      15
  `define PMEM_SIZE     55296
`endif
`ifdef PMEM_SIZE_51_KB
  `define PMEM_AWIDTH      15
  `define PMEM_SIZE     52224
`endif
`ifdef PMEM_SIZE_48_KB
  `define PMEM_AWIDTH      15
  `define PMEM_SIZE     49152
`endif
`ifdef PMEM_SIZE_41_KB
  `define PMEM_AWIDTH      15
  `define PMEM_SIZE     41984
`endif
`ifdef PMEM_SIZE_32_KB
  `define PMEM_AWIDTH      14
  `define PMEM_SIZE     32768
`endif
`ifdef PMEM_SIZE_24_KB
  `define PMEM_AWIDTH      14
  `define PMEM_SIZE     24576
`endif
`ifdef PMEM_SIZE_16_KB
  `define PMEM_AWIDTH      13
  `define PMEM_SIZE     16384
`endif
`ifdef PMEM_SIZE_12_KB
  `define PMEM_AWIDTH      13
  `define PMEM_SIZE     12288
`endif
`ifdef PMEM_SIZE_8_KB
  `define PMEM_AWIDTH      12
  `define PMEM_SIZE      8192
`endif
`ifdef PMEM_SIZE_4_KB
  `define PMEM_AWIDTH      11
  `define PMEM_SIZE      4096
`endif
`ifdef PMEM_SIZE_2_KB
  `define PMEM_AWIDTH      10
  `define PMEM_SIZE      2048
`endif
`ifdef PMEM_SIZE_1_KB
  `define PMEM_AWIDTH       9
  `define PMEM_SIZE      1024
`endif
 
// Data Memory Size
`ifdef DMEM_SIZE_32_KB
  `define DMEM_AWIDTH       14
  `define DMEM_SIZE      32768
`endif
`ifdef DMEM_SIZE_24_KB
  `define DMEM_AWIDTH       14
  `define DMEM_SIZE      24576
`endif
`ifdef DMEM_SIZE_16_KB
  `define DMEM_AWIDTH       13
  `define DMEM_SIZE      16384
`endif
`ifdef DMEM_SIZE_10_KB
  `define DMEM_AWIDTH       13
  `define DMEM_SIZE      10240
`endif
`ifdef DMEM_SIZE_8_KB
  `define DMEM_AWIDTH       12
  `define DMEM_SIZE       8192
`endif
`ifdef DMEM_SIZE_5_KB
  `define DMEM_AWIDTH       12
  `define DMEM_SIZE       5120
`endif
`ifdef DMEM_SIZE_4_KB
  `define DMEM_AWIDTH       11
  `define DMEM_SIZE       4096
`endif
`ifdef DMEM_SIZE_2p5_KB
  `define DMEM_AWIDTH       11
  `define DMEM_SIZE       2560
`endif
`ifdef DMEM_SIZE_2_KB
  `define DMEM_AWIDTH       10
  `define DMEM_SIZE       2048
`endif
`ifdef DMEM_SIZE_1_KB
  `define DMEM_AWIDTH        9
  `define DMEM_SIZE       1024
`endif
`ifdef DMEM_SIZE_512_B
  `define DMEM_AWIDTH        8
  `define DMEM_SIZE        512
`endif
`ifdef DMEM_SIZE_256_B
  `define DMEM_AWIDTH        7
  `define DMEM_SIZE        256
`endif
`ifdef DMEM_SIZE_128_B
  `define DMEM_AWIDTH        6
  `define DMEM_SIZE        128
`endif
 
// Data Memory Base Adresses
`define DMEM_BASE  16'h0200
 
// Program & Data Memory most significant address bit (for 16 bit words)
`define PMEM_MSB   `PMEM_AWIDTH-1
`define DMEM_MSB   `DMEM_AWIDTH-1
 
//
// STATES, REGISTER FIELDS, ...
//======================================
 
// Instructions type
`define INST_SO  0
`define INST_JMP 1
`define INST_TO  2
 
// Single-operand arithmetic
`define RRC    0
`define SWPB   1
`define RRA    2
`define SXT    3
`define PUSH   4
`define CALL   5
`define RETI   6
`define IRQ    7
 
// Conditional jump
`define JNE    0
`define JEQ    1
`define JNC    2
`define JC     3
`define JN     4
`define JGE    5
`define JL     6
`define JMP    7
 
// Two-operand arithmetic
`define MOV    0
`define ADD    1
`define ADDC   2
`define SUBC   3
`define SUB    4
`define CMP    5
`define DADD   6
`define BIT    7
`define BIC    8
`define BIS    9
`define XOR   10
`define AND   11
 
// Addressing modes
`define DIR      0
`define IDX      1
`define INDIR    2
`define INDIR_I  3
`define SYMB     4
`define IMM      5
`define ABS      6
`define CONST    7
 
// Execution state machine
`define E_IRQ_0    4'h0
`define E_IRQ_1    4'h1
`define E_IRQ_2    4'h2
`define E_IRQ_3    4'h3
`define E_IRQ_4    4'h4
`define E_SRC_AD   4'h5
`define E_SRC_RD   4'h6
`define E_SRC_WR   4'h7
`define E_DST_AD   4'h8
`define E_DST_RD   4'h9
`define E_DST_WR   4'hA
`define E_EXEC     4'hB
`define E_JUMP     4'hC
`define E_IDLE     4'hD
 
// ALU control signals
`define ALU_SRC_INV   0
`define ALU_INC       1
`define ALU_INC_C     2
`define ALU_ADD       3
`define ALU_AND       4
`define ALU_OR        5
`define ALU_XOR       6
`define ALU_DADD      7
`define ALU_STAT_7    8
`define ALU_STAT_F    9
`define ALU_SHIFT    10
`define EXEC_NO_WR   11
 
// Debug interface
`define DBG_UART_WR   18
`define DBG_UART_BW   17
`define DBG_UART_ADDR 16:11
 
// Debug interface CPU_CTL register
`define HALT        0
`define RUN         1
`define ISTEP       2
`define SW_BRK_EN   3
`define FRZ_BRK_EN  4
`define RST_BRK_EN  5
`define CPU_RST     6
 
// Debug interface CPU_STAT register
`define HALT_RUN    0
`define PUC_PND     1
`define SWBRK_PND   3
`define HWBRK0_PND  4
`define HWBRK1_PND  5
 
// Debug interface BRKx_CTL register
`define BRK_MODE_RD 0
`define BRK_MODE_WR 1
`define BRK_MODE    1:0
`define BRK_EN      2
`define BRK_I_EN    3
`define BRK_RANGE   4
 
// Basic clock module: BCSCTL1 Control Register
`define DIVAx       5:4
 
// Basic clock module: BCSCTL2 Control Register
`define SELS        3
`define DIVSx       2:1
 
 
//
// DEBUG INTERFACE EXTRA CONFIGURATION
//======================================
 
// Debug interface: Software breakpoint opcode
`define DBG_SWBRK_OP 16'h4343
 
// Debug UART interface auto data synchronization
// If the following define is commented out, then
// the DBG_UART_BAUD and DBG_DCO_FREQ need to be properly
// defined.
`define DBG_UART_AUTO_SYNC
 
// Debug UART interface data rate
//      In order to properly setup the UART debug interface, you
//      need to specify the DCO_CLK frequency (DBG_DCO_FREQ) and
//      the chosen BAUD rate from the UART interface.
//
//`define DBG_UART_BAUD    9600
//`define DBG_UART_BAUD   19200
//`define DBG_UART_BAUD   38400
//`define DBG_UART_BAUD   57600
//`define DBG_UART_BAUD  115200
//`define DBG_UART_BAUD  230400
//`define DBG_UART_BAUD  460800
//`define DBG_UART_BAUD  576000
//`define DBG_UART_BAUD  921600
`define DBG_UART_BAUD 2000000
`define DBG_DCO_FREQ  20000000
`define DBG_UART_CNT ((`DBG_DCO_FREQ/`DBG_UART_BAUD)-1)
 
// Enable/Disable the hardware breakpoint RANGE mode
`define HWBRK_RANGE 1'b0
 
// Counter width for the debug interface UART
`define DBG_UART_XFER_CNT_W 16
 
// Check configuration
`ifdef DBG_EN
 `ifdef DBG_UART
   `ifdef DBG_JTAG
CONFIGURATION ERROR: JTAG AND UART DEBUG INTERFACE ARE BOTH ENABLED
   `endif
 `else
   `ifdef DBG_JTAG
CONFIGURATION ERROR: JTAG INTERFACE NOT SUPPORTED
   `else
CONFIGURATION ERROR: JTAG OR UART DEBUG INTERFACE SHOULD BE ENABLED
   `endif
 `endif
`endif
 
//
// MULTIPLIER CONFIGURATION
//======================================
 
// If uncommented, the following define selects
// the 16x16 multiplier (1 cycle) instead of the
// default 16x8 multplier (2 cycles)
//`define MPY_16x16
 

Line No.	Rev	Author	Line
1	2	olivier.gi	`//----------------------------------------------------------------------------`
2			`// Copyright (C) 2001 Authors`
3			`//`
4			`// This source file may be used and distributed without restriction provided`
5			`// that this copyright statement is not removed from the file and that any`
6			`// derivative work contains the original copyright notice and the associated`
7			`// disclaimer.`
8			`//`
9			`// This source file is free software; you can redistribute it and/or modify`
10			`// it under the terms of the GNU Lesser General Public License as published`
11			`// by the Free Software Foundation; either version 2.1 of the License, or`
12			`// (at your option) any later version.`
13			`//`
14			`// This source is distributed in the hope that it will be useful, but WITHOUT`
15			`// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or`
16			`// FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public`
17			`// License for more details.`
18			`//`
19			`// You should have received a copy of the GNU Lesser General Public License`
20			`// along with this source; if not, write to the Free Software Foundation,`
21			`// Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA`
22			`//`
23			`//----------------------------------------------------------------------------`
24			`//`
25	23	olivier.gi	`// *File Name: openMSP430_defines.v`
26	2	olivier.gi	`//`
27			`// *Module Description:`
28			`// openMSP430 Configuration file`
29			`//`
30			`// *Author(s):`
31			`// - Olivier Girard, olgirard@gmail.com`
32			`//`
33			`//----------------------------------------------------------------------------`
34	17	olivier.gi	`// $Rev: 109 $`
35			`// $LastChangedBy: olivier.girard $`
36			`// $LastChangedDate: 2011-03-27 13:49:47 +0200 (Sun, 27 Mar 2011) $`
37			`//----------------------------------------------------------------------------`
38	104	olivier.gi	//`define OMSP_NO_INCLUDE
39			`ifdef OMSP_NO_INCLUDE
40			`else
41	33	olivier.gi	`include "openMSP430_undefines.v"
42	104	olivier.gi	`endif
43	2	olivier.gi
44			`//----------------------------------------------------------------------------`
45			`// SYSTEM CONFIGURATION`
46			`//----------------------------------------------------------------------------`
47	72	olivier.gi	`//`
48			`// Note: the sum of both program and data memories should not exceed 63.5 kB`
49			`//`
50	2	olivier.gi
51	33	olivier.gi	`// Program Memory Size:`
52	72	olivier.gi	`// Uncomment the required memory size`
53			`//-------------------------------------------------------`
54			//`define PMEM_SIZE_59_KB
55			//`define PMEM_SIZE_55_KB
56			//`define PMEM_SIZE_54_KB
57			//`define PMEM_SIZE_51_KB
58			//`define PMEM_SIZE_48_KB
59			//`define PMEM_SIZE_41_KB
60			//`define PMEM_SIZE_32_KB
61			//`define PMEM_SIZE_24_KB
62			//`define PMEM_SIZE_16_KB
63			//`define PMEM_SIZE_12_KB
64			//`define PMEM_SIZE_8_KB
65			`define PMEM_SIZE_4_KB
66			//`define PMEM_SIZE_2_KB
67			//`define PMEM_SIZE_1_KB
68	2	olivier.gi
69	33	olivier.gi	`// Data Memory Size:`
70	72	olivier.gi	`// Uncomment the required memory size`
71			`//-------------------------------------------------------`
72			//`define DMEM_SIZE_32_KB
73			//`define DMEM_SIZE_24_KB
74			//`define DMEM_SIZE_16_KB
75			//`define DMEM_SIZE_10_KB
76			//`define DMEM_SIZE_8_KB
77			//`define DMEM_SIZE_5_KB
78			//`define DMEM_SIZE_4_KB
79			//`define DMEM_SIZE_2p5_KB
80			//`define DMEM_SIZE_2_KB
81			`define DMEM_SIZE_1_KB
82			//`define DMEM_SIZE_512_B
83			//`define DMEM_SIZE_256_B
84			//`define DMEM_SIZE_128_B
85	2	olivier.gi
86	72	olivier.gi
87	71	olivier.gi	`// Include/Exclude Hardware Multiplier`
88			`define MULTIPLIER
89
90
91	2	olivier.gi	`//----------------------------------------------------------------------------`
92			`// REMOTE DEBUGGING INTERFACE CONFIGURATION`
93			`//----------------------------------------------------------------------------`
94
95			`// Include Debug interface`
96			`define DBG_EN
97
98			`// Debug interface selection`
99			// `define DBG_UART -> Enable UART (8N1) debug interface
100	33	olivier.gi	// `define DBG_JTAG -> DON'T UNCOMMENT, NOT SUPPORTED
101	2	olivier.gi	`//`
102			`define DBG_UART
103			//`define DBG_JTAG
104
105			`// Number of hardware breakpoints (each unit contains 2 hw address breakpoints)`
106			// `define DBG_HWBRK_0 -> Include hardware breakpoints unit 0
107			// `define DBG_HWBRK_1 -> Include hardware breakpoints unit 1
108			// `define DBG_HWBRK_2 -> Include hardware breakpoints unit 2
109			// `define DBG_HWBRK_3 -> Include hardware breakpoints unit 3
110			`//`
111			`define DBG_HWBRK_0
112	37	olivier.gi	//`define DBG_HWBRK_1
113			//`define DBG_HWBRK_2
114			//`define DBG_HWBRK_3
115	2	olivier.gi
116
117	109	olivier.gi	`// Defines the debugger CPU_CTL.RST_BRK_EN reset value (CPU break on PUC reset)`
118			`//`
119			`// When defined, this concretely bring the CPU to break after a PUC`
120			`// occurrence by default. This is typically usefull when the program`
121			`// memory can only be initialized through the serial debug interface.`
122			`//`
123			//`define DBG_RST_BRK_EN
124
125
126	2	olivier.gi	`//==========================================================================//`
127			`//==========================================================================//`
128			`//==========================================================================//`
129			`//==========================================================================//`
130			`//===== SYSTEM CONSTANTS --- !!!!!!!! DO NOT EDIT !!!!!!!! =====//`
131			`//==========================================================================//`
132			`//==========================================================================//`
133			`//==========================================================================//`
134			`//==========================================================================//`
135
136	72	olivier.gi	`//`
137			`// PROGRAM & DATA MEMORY CONFIGURATION`
138			`//======================================`
139	2	olivier.gi
140	72	olivier.gi	`// Program Memory Size`
141			`ifdef PMEM_SIZE_59_KB
142			`define PMEM_AWIDTH 15
143			`define PMEM_SIZE 60416
144			`endif
145			`ifdef PMEM_SIZE_55_KB
146			`define PMEM_AWIDTH 15
147			`define PMEM_SIZE 56320
148			`endif
149			`ifdef PMEM_SIZE_54_KB
150			`define PMEM_AWIDTH 15
151			`define PMEM_SIZE 55296
152			`endif
153			`ifdef PMEM_SIZE_51_KB
154			`define PMEM_AWIDTH 15
155			`define PMEM_SIZE 52224
156			`endif
157			`ifdef PMEM_SIZE_48_KB
158			`define PMEM_AWIDTH 15
159			`define PMEM_SIZE 49152
160			`endif
161			`ifdef PMEM_SIZE_41_KB
162			`define PMEM_AWIDTH 15
163			`define PMEM_SIZE 41984
164			`endif
165			`ifdef PMEM_SIZE_32_KB
166			`define PMEM_AWIDTH 14
167			`define PMEM_SIZE 32768
168			`endif
169			`ifdef PMEM_SIZE_24_KB
170			`define PMEM_AWIDTH 14
171			`define PMEM_SIZE 24576
172			`endif
173			`ifdef PMEM_SIZE_16_KB
174			`define PMEM_AWIDTH 13
175			`define PMEM_SIZE 16384
176			`endif
177			`ifdef PMEM_SIZE_12_KB
178			`define PMEM_AWIDTH 13
179			`define PMEM_SIZE 12288
180			`endif
181			`ifdef PMEM_SIZE_8_KB
182			`define PMEM_AWIDTH 12
183			`define PMEM_SIZE 8192
184			`endif
185			`ifdef PMEM_SIZE_4_KB
186			`define PMEM_AWIDTH 11
187			`define PMEM_SIZE 4096
188			`endif
189			`ifdef PMEM_SIZE_2_KB
190			`define PMEM_AWIDTH 10
191			`define PMEM_SIZE 2048
192			`endif
193			`ifdef PMEM_SIZE_1_KB
194			`define PMEM_AWIDTH 9
195			`define PMEM_SIZE 1024
196			`endif
197
198			`// Data Memory Size`
199			`ifdef DMEM_SIZE_32_KB
200			`define DMEM_AWIDTH 14
201			`define DMEM_SIZE 32768
202			`endif
203			`ifdef DMEM_SIZE_24_KB
204			`define DMEM_AWIDTH 14
205			`define DMEM_SIZE 24576
206			`endif
207			`ifdef DMEM_SIZE_16_KB
208			`define DMEM_AWIDTH 13
209			`define DMEM_SIZE 16384
210			`endif
211			`ifdef DMEM_SIZE_10_KB
212			`define DMEM_AWIDTH 13
213			`define DMEM_SIZE 10240
214			`endif
215			`ifdef DMEM_SIZE_8_KB
216			`define DMEM_AWIDTH 12
217			`define DMEM_SIZE 8192
218			`endif
219			`ifdef DMEM_SIZE_5_KB
220			`define DMEM_AWIDTH 12
221			`define DMEM_SIZE 5120
222			`endif
223			`ifdef DMEM_SIZE_4_KB
224			`define DMEM_AWIDTH 11
225			`define DMEM_SIZE 4096
226			`endif
227			`ifdef DMEM_SIZE_2p5_KB
228			`define DMEM_AWIDTH 11
229			`define DMEM_SIZE 2560
230			`endif
231			`ifdef DMEM_SIZE_2_KB
232			`define DMEM_AWIDTH 10
233			`define DMEM_SIZE 2048
234			`endif
235			`ifdef DMEM_SIZE_1_KB
236			`define DMEM_AWIDTH 9
237			`define DMEM_SIZE 1024
238			`endif
239			`ifdef DMEM_SIZE_512_B
240			`define DMEM_AWIDTH 8
241			`define DMEM_SIZE 512
242			`endif
243			`ifdef DMEM_SIZE_256_B
244			`define DMEM_AWIDTH 7
245			`define DMEM_SIZE 256
246			`endif
247			`ifdef DMEM_SIZE_128_B
248			`define DMEM_AWIDTH 6
249			`define DMEM_SIZE 128
250			`endif
251
252	33	olivier.gi	`// Data Memory Base Adresses`
253			`define DMEM_BASE 16'h0200
254	2	olivier.gi
255	33	olivier.gi	`// Program & Data Memory most significant address bit (for 16 bit words)`
256			`define PMEM_MSB `PMEM_AWIDTH-1
257			`define DMEM_MSB `DMEM_AWIDTH-1
258	2	olivier.gi
259	72	olivier.gi	`//`
260			`// STATES, REGISTER FIELDS, ...`
261			`//======================================`
262	2	olivier.gi
263			`// Instructions type`
264			`define INST_SO 0
265			`define INST_JMP 1
266			`define INST_TO 2
267
268			`// Single-operand arithmetic`
269			`define RRC 0
270			`define SWPB 1
271			`define RRA 2
272			`define SXT 3
273			`define PUSH 4
274			`define CALL 5
275			`define RETI 6
276			`define IRQ 7
277
278			`// Conditional jump`
279			`define JNE 0
280			`define JEQ 1
281			`define JNC 2
282			`define JC 3
283			`define JN 4
284			`define JGE 5
285			`define JL 6
286			`define JMP 7
287
288			`// Two-operand arithmetic`
289			`define MOV 0
290			`define ADD 1
291			`define ADDC 2
292			`define SUBC 3
293			`define SUB 4
294			`define CMP 5
295			`define DADD 6
296			`define BIT 7
297			`define BIC 8
298			`define BIS 9
299			`define XOR 10
300			`define AND 11
301
302			`// Addressing modes`
303			`define DIR 0
304			`define IDX 1
305			`define INDIR 2
306			`define INDIR_I 3
307			`define SYMB 4
308			`define IMM 5
309			`define ABS 6
310			`define CONST 7
311
312			`// Execution state machine`
313			`define E_IRQ_0 4'h0
314			`define E_IRQ_1 4'h1
315			`define E_IRQ_2 4'h2
316			`define E_IRQ_3 4'h3
317			`define E_IRQ_4 4'h4
318			`define E_SRC_AD 4'h5
319			`define E_SRC_RD 4'h6
320			`define E_SRC_WR 4'h7
321			`define E_DST_AD 4'h8
322			`define E_DST_RD 4'h9
323			`define E_DST_WR 4'hA
324			`define E_EXEC 4'hB
325			`define E_JUMP 4'hC
326			`define E_IDLE 4'hD
327
328			`// ALU control signals`
329			`define ALU_SRC_INV 0
330			`define ALU_INC 1
331			`define ALU_INC_C 2
332			`define ALU_ADD 3
333			`define ALU_AND 4
334			`define ALU_OR 5
335			`define ALU_XOR 6
336			`define ALU_DADD 7
337			`define ALU_STAT_7 8
338			`define ALU_STAT_F 9
339			`define ALU_SHIFT 10
340			`define EXEC_NO_WR 11
341
342			`// Debug interface`
343			`define DBG_UART_WR 18
344			`define DBG_UART_BW 17
345			`define DBG_UART_ADDR 16:11
346
347			`// Debug interface CPU_CTL register`
348			`define HALT 0
349			`define RUN 1
350			`define ISTEP 2
351			`define SW_BRK_EN 3
352			`define FRZ_BRK_EN 4
353			`define RST_BRK_EN 5
354			`define CPU_RST 6
355
356			`// Debug interface CPU_STAT register`
357			`define HALT_RUN 0
358			`define PUC_PND 1
359			`define SWBRK_PND 3
360			`define HWBRK0_PND 4
361			`define HWBRK1_PND 5
362
363			`// Debug interface BRKx_CTL register`
364			`define BRK_MODE_RD 0
365			`define BRK_MODE_WR 1
366			`define BRK_MODE 1:0
367			`define BRK_EN 2
368			`define BRK_I_EN 3
369			`define BRK_RANGE 4
370
371			`// Basic clock module: BCSCTL1 Control Register`
372			`define DIVAx 5:4
373
374			`// Basic clock module: BCSCTL2 Control Register`
375			`define SELS 3
376			`define DIVSx 2:1
377
378
379			`//`
380			`// DEBUG INTERFACE EXTRA CONFIGURATION`
381			`//======================================`
382
383			`// Debug interface: Software breakpoint opcode`
384			`define DBG_SWBRK_OP 16'h4343
385
386			`// Debug UART interface auto data synchronization`
387			`// If the following define is commented out, then`
388			`// the DBG_UART_BAUD and DBG_DCO_FREQ need to be properly`
389			`// defined.`
390			`define DBG_UART_AUTO_SYNC
391
392			`// Debug UART interface data rate`
393			`// In order to properly setup the UART debug interface, you`
394			`// need to specify the DCO_CLK frequency (DBG_DCO_FREQ) and`
395			`// the chosen BAUD rate from the UART interface.`
396			`//`
397			//`define DBG_UART_BAUD 9600
398			//`define DBG_UART_BAUD 19200
399			//`define DBG_UART_BAUD 38400
400			//`define DBG_UART_BAUD 57600
401			//`define DBG_UART_BAUD 115200
402			//`define DBG_UART_BAUD 230400
403			//`define DBG_UART_BAUD 460800
404			//`define DBG_UART_BAUD 576000
405			//`define DBG_UART_BAUD 921600
406			`define DBG_UART_BAUD 2000000
407			`define DBG_DCO_FREQ 20000000
408			`define DBG_UART_CNT ((`DBG_DCO_FREQ/`DBG_UART_BAUD)-1)
409
410	59	olivier.gi	`// Enable/Disable the hardware breakpoint RANGE mode`
411			`define HWBRK_RANGE 1'b0
412
413	74	olivier.gi	`// Counter width for the debug interface UART`
414			`define DBG_UART_XFER_CNT_W 16
415
416	2	olivier.gi	`// Check configuration`
417			`ifdef DBG_EN
418			`ifdef DBG_UART
419			`ifdef DBG_JTAG
420			`CONFIGURATION ERROR: JTAG AND UART DEBUG INTERFACE ARE BOTH ENABLED`
421			`endif
422			`else
423			`ifdef DBG_JTAG
424	33	olivier.gi	`CONFIGURATION ERROR: JTAG INTERFACE NOT SUPPORTED`
425	2	olivier.gi	`else
426			`CONFIGURATION ERROR: JTAG OR UART DEBUG INTERFACE SHOULD BE ENABLED`
427			`endif
428			`endif
429			`endif
430	71	olivier.gi
431			`//`
432			`// MULTIPLIER CONFIGURATION`
433			`//======================================`
434
435			`// If uncommented, the following define selects`
436			`// the 16x16 multiplier (1 cycle) instead of the`
437			`// default 16x8 multplier (2 cycles)`
438			//`define MPY_16x16
439

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[/] [openmsp430/] [trunk/] [fpga/] [xilinx_diligent_s3board/] [rtl/] [verilog/] [openmsp430/] [openMSP430_defines.v] - Blame information for rev 109