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[/] [openmsp430/] [trunk/] [fpga/] [xilinx_diligent_s3board/] [sim/] [rtl_sim/] [bin/] [msp430sim] - Blame information for rev 16

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Line No. Rev Author Line
1 2 olivier.gi
#!/bin/sh
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#------------------------------------------------------------------------------
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# Copyright (C) 2001 Authors
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#
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# This source file may be used and distributed without restriction provided
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# that this copyright statement is not removed from the file and that any
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# derivative work contains the original copyright notice and the associated
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# disclaimer.
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#
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# This source file is free software; you can redistribute it and/or modify
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# it under the terms of the GNU Lesser General Public License as published
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# by the Free Software Foundation; either version 2.1 of the License, or
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# (at your option) any later version.
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#
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# This source is distributed in the hope that it will be useful, but WITHOUT
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# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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# FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
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# License for more details.
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#
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# You should have received a copy of the GNU Lesser General Public License
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# along with this source; if not, write to the Free Software Foundation,
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# Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA
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#
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#------------------------------------------------------------------------------
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#
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# File Name: msp430sim
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#
28 16 olivier.gi
# Author(s):
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#             - Olivier Girard,    olgirard@gmail.com
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#
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#------------------------------------------------------------------------------
32 16 olivier.gi
# $Rev: 16 $
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# $LastChangedBy: olivier.girard $
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# $LastChangedDate: 2009-08-04 23:03:47 +0200 (Tue, 04 Aug 2009) $
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#------------------------------------------------------------------------------
36 2 olivier.gi
 
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###############################################################################
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#                            Parameter Check                                  #
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###############################################################################
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EXPECTED_ARGS=1
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if [ $# -ne $EXPECTED_ARGS ]; then
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  echo "ERROR    : wrong number of arguments"
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  echo "USAGE    : msp430sim "
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  echo "Example  : msp430sim leds"
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  exit 1
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fi
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###############################################################################
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#                     Check if the required files exist                       #
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###############################################################################
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softdir=../../../software/$1;
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elffile=../../../software/$1/$1.elf;
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verfile=../src/$1.v;
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submitfile=../src/submit.f;
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incfile=../../../rtl/verilog/openMSP430.inc;
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if [ ! -e $softdir ]; then
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    echo "Software directory doesn't exist: $softdir"
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    exit 1
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fi
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if [ ! -e $verfile ]; then
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    echo "Verilog stimulus file $verfile doesn't exist: $verfile"
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    exit 1
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fi
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if [ ! -e $submitfile ]; then
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    echo "Verilog submit file $submitfile doesn't exist: $submitfile"
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    exit 1
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fi
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###############################################################################
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#                               Cleanup                                       #
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###############################################################################
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echo "Cleanup..."
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rm -rf rom.*
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rm -rf stimulus.v
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###############################################################################
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#                              Run simulation                                 #
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###############################################################################
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echo " ======================================================="
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echo "| Start simulation:             $1"
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echo " ======================================================="
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# Make C program
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cd $softdir
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make
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cd ../../sim/rtl_sim/run/
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# Create links
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ln -s $elffile rom.elf
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ln -s $verfile stimulus.v
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# Make local copy of the openMSP403 configuration file and remove comments
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cp  $incfile  ./rom.inc
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sed -i "/^\/\// s,.*,," rom.inc
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# Get ROM size
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romsize=`grep ROM_AWIDTH rom.inc | grep -v ROM_MSB | grep -v ROM_SIZE`
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romsize=${romsize##* }
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romsize=$((2<<$romsize))
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# Create IHEX file from ELF
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echo "Convert ELF file to IHEX format..."
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msp430-objcopy -O ihex  rom.elf rom.ihex
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# Generate ROM memory file
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echo "Convert IHEX file to Verilog MEMH format..."
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../bin/ihex2mem.tcl -ihex rom.ihex -out rom.mem -mem_size $romsize
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# Start verilog simulation
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echo "Start Verilog simulation..."
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../bin/rtlsim.sh    stimulus.v rom.mem $submitfile

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