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[/] [openmsp430/] [trunk/] [fpga/] [xilinx_diligent_s3board/] [sim/] [rtl_sim/] [src/] [ta_uart.v] - Blame information for rev 211

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/*===========================================================================*/
/*                                 DIGITAL I/O                               */
/*---------------------------------------------------------------------------*/
/* Test the Digital I/O interface.                                           */
/*===========================================================================*/
 
`define VERY_LONG_TIMEOUT
 
// Data rate
parameter UART_FREQ   = 115200;
integer   UART_PERIOD = 1000000000/UART_FREQ;
 
 
reg [7:0] rxbuf;
integer   rxcnt;
 
task uart_rx;
      begin
         @(negedge UART_TXD);
         rxbuf = 0;
         #(UART_PERIOD*3/2);
         for (rxcnt = 0; rxcnt < 8; rxcnt = rxcnt + 1)
           begin
              rxbuf = {UART_TXD, rxbuf[7:1]};
              #(UART_PERIOD);
           end
         $write("%s", rxbuf);
         $fflush();
      end
endtask
 
task uart_tx;
      input [7:0] txbuf;
 
      reg [9:0] txbuf_full;
      integer   txcnt;
      begin
         UART_RXD = 1'b1;
         txbuf_full = {1'b1, txbuf, 1'b0};
         #(UART_PERIOD);
         for (txcnt = 0; txcnt < 10; txcnt = txcnt + 1)
           begin
              UART_RXD   =  txbuf_full[txcnt];
              #(UART_PERIOD);
           end
      end
endtask
 
initial forever uart_rx;
 
 
initial
   begin
      $display(" ===============================================");
      $display("|                 START SIMULATION              |");
      $display(" ===============================================");
      repeat(5) @(posedge CLK_50MHz);
      stimulus_done = 0;
 
      UART_RXD = 1'b1;
 
      // Select GPIOs (for software uart)
      SW1 = 1'b0;
      SW0 = 1'b1;
 
      // Wait for welcome message to be received
      repeat(125000) @(posedge mclk);
 
      // Send something
      uart_tx("B");
      repeat(3000) @(posedge mclk);
      uart_tx("o");
      repeat(3000) @(posedge mclk);
      uart_tx("n");
      repeat(3000) @(posedge mclk);
      uart_tx("j");
      repeat(3000) @(posedge mclk);
      uart_tx("o");
      repeat(3000) @(posedge mclk);
      uart_tx("u");
      repeat(3000) @(posedge mclk);
      uart_tx("r");
      repeat(3000) @(posedge mclk);
      uart_tx(" ");
      repeat(3000) @(posedge mclk);
      uart_tx(":");
      repeat(3000) @(posedge mclk);
      uart_tx("-");
      repeat(3000) @(posedge mclk);
      uart_tx(")");
      repeat(3000) @(posedge mclk);
      uart_tx("\n");
      repeat(3000) @(posedge mclk);
 
      stimulus_done = 1;
      repeat(10) @(posedge mclk);
      $display("\n");
      $finish();
 
   end
 

Line No.	Rev	Author	Line
1	2	olivier.gi	`/===========================================================================/`
2			`/* DIGITAL I/O */`
3			`/---------------------------------------------------------------------------/`
4			`/* Test the Digital I/O interface. */`
5			`/===========================================================================/`
6
7	153	olivier.gi	`define VERY_LONG_TIMEOUT
8	2	olivier.gi
9	153	olivier.gi	`// Data rate`
10			`parameter UART_FREQ = 115200;`
11			`integer UART_PERIOD = 1000000000/UART_FREQ;`
12	2	olivier.gi
13	153	olivier.gi
14	2	olivier.gi	`reg [7:0] rxbuf;`
15			`integer rxcnt;`
16
17			`task uart_rx;`
18			`begin`
19			`@(negedge UART_TXD);`
20			`rxbuf = 0;`
21	153	olivier.gi	`#(UART_PERIOD*3/2);`
22	2	olivier.gi	`for (rxcnt = 0; rxcnt < 8; rxcnt = rxcnt + 1)`
23			`begin`
24			`rxbuf = {UART_TXD, rxbuf[7:1]};`
25	153	olivier.gi	`#(UART_PERIOD);`
26			`end`
27			`$write("%s", rxbuf);`
28			`$fflush();`
29	2	olivier.gi	`end`
30			`endtask`
31
32			`task uart_tx;`
33			`input [7:0] txbuf;`
34
35			`reg [9:0] txbuf_full;`
36			`integer txcnt;`
37			`begin`
38			`UART_RXD = 1'b1;`
39			`txbuf_full = {1'b1, txbuf, 1'b0};`
40	153	olivier.gi	`#(UART_PERIOD);`
41	2	olivier.gi	`for (txcnt = 0; txcnt < 10; txcnt = txcnt + 1)`
42			`begin`
43			`UART_RXD = txbuf_full[txcnt];`
44	153	olivier.gi	`#(UART_PERIOD);`
45	2	olivier.gi	`end`
46			`end`
47			`endtask`
48
49	153	olivier.gi	`initial forever uart_rx;`
50	2	olivier.gi
51
52			`initial`
53			`begin`
54			`$display(" ===============================================");`
55			`$display("\| START SIMULATION \|");`
56			`$display(" ===============================================");`
57			`repeat(5) @(posedge CLK_50MHz);`
58			`stimulus_done = 0;`
59
60	153	olivier.gi	`UART_RXD = 1'b1;`
61	2	olivier.gi
62	153	olivier.gi	`// Select GPIOs (for software uart)`
63			`SW1 = 1'b0;`
64			`SW0 = 1'b1;`
65	2	olivier.gi
66	153	olivier.gi	`// Wait for welcome message to be received`
67			`repeat(125000) @(posedge mclk);`
68	2	olivier.gi
69	153	olivier.gi	`// Send something`
70			`uart_tx("B");`
71			`repeat(3000) @(posedge mclk);`
72			`uart_tx("o");`
73			`repeat(3000) @(posedge mclk);`
74			`uart_tx("n");`
75			`repeat(3000) @(posedge mclk);`
76			`uart_tx("j");`
77			`repeat(3000) @(posedge mclk);`
78			`uart_tx("o");`
79			`repeat(3000) @(posedge mclk);`
80			`uart_tx("u");`
81			`repeat(3000) @(posedge mclk);`
82			`uart_tx("r");`
83			`repeat(3000) @(posedge mclk);`
84			`uart_tx(" ");`
85			`repeat(3000) @(posedge mclk);`
86			`uart_tx(":");`
87			`repeat(3000) @(posedge mclk);`
88			`uart_tx("-");`
89			`repeat(3000) @(posedge mclk);`
90			`uart_tx(")");`
91			`repeat(3000) @(posedge mclk);`
92			`uart_tx("\n");`
93			`repeat(3000) @(posedge mclk);`
94
95	2	olivier.gi	`stimulus_done = 1;`
96	153	olivier.gi	`repeat(10) @(posedge mclk);`
97			`$display("\n");`
98			`$finish();`
99	2	olivier.gi
100			`end`
101

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[/] [openmsp430/] [trunk/] [fpga/] [xilinx_diligent_s3board/] [sim/] [rtl_sim/] [src/] [ta_uart.v] - Blame information for rev 211