URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [fpga/] [xilinx_diligent_s3board/] [synthesis/] [xilinx/] [scripts/] [memory.bmm] - Blame information for rev 153

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ADDRESS_SPACE blockrom RAMB16 [0x0000:0x0fff]
 
  BUS_BLOCK
 
      rom_8x2k_hi_0/B8 [15:8] LOC = X1Y2;
      rom_8x2k_lo_0/B8 [7:0]  LOC = X1Y1;
 
  END_BUS_BLOCK;
 
END_ADDRESS_SPACE;
 
ADDRESS_SPACE blockram RAMB16 [0x0200:0x11ff]
 
  BUS_BLOCK
 
      ram_8x512_hi_0/B8 [15:8] LOC = X1Y4;
      ram_8x512_lo_0/B8 [7:0]  LOC = X1Y3;
 
  END_BUS_BLOCK;
 
END_ADDRESS_SPACE;

Line No.	Rev	Author	Line
1	153	olivier.gi	`ADDRESS_SPACE blockrom RAMB16 [0x0000:0x0fff]`
2	2	olivier.gi
3			`BUS_BLOCK`
4
5	153	olivier.gi	`rom_8x2k_hi_0/B8 [15:8] LOC = X1Y2;`
6	2	olivier.gi	`rom_8x2k_lo_0/B8 [7:0] LOC = X1Y1;`
7
8			`END_BUS_BLOCK;`
9
10			`END_ADDRESS_SPACE;`
11
12			`ADDRESS_SPACE blockram RAMB16 [0x0200:0x11ff]`
13
14			`BUS_BLOCK`
15
16	153	olivier.gi	`ram_8x512_hi_0/B8 [15:8] LOC = X1Y4;`
17	2	olivier.gi	`ram_8x512_lo_0/B8 [7:0] LOC = X1Y3;`
18
19			`END_BUS_BLOCK;`
20
21			`END_ADDRESS_SPACE;`

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Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [fpga/] [xilinx_diligent_s3board/] [synthesis/] [xilinx/] [scripts/] [memory.bmm] - Blame information for rev 153