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[/] [openrisc/] [tags/] [gdb/] [gdb-6.8/] [gdb-6.8.openrisc-2.1/] [sim/] [testsuite/] [sim/] [frv/] [lddcu.cgs] - Blame information for rev 33

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Line No. Rev Author Line
1 24 jeremybenn 
# frv testcase for lddcu @($GRi,$GRj),$GRk
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# mach: frv
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# as(frv): -mcpu=frv
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        .include "testutils.inc"
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        start
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        .global lddcu
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lddcu:
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        set_mem_limmed  0xdead,0xbeef,sp
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        inc_gr_immed    -4,sp
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        set_mem_limmed  0xbeef,0xdead,sp
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        set_gr_gr       sp,gr20
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        set_cpr_limmed  0xdead,0xbeef,cpr8
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        set_cpr_limmed  0xbeef,0xdead,cpr9
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        set_gr_immed    0,gr7
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        lddcu           @(sp,gr7),cpr8
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        test_cpr_limmed 0xbeef,0xdead,cpr8
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        test_cpr_limmed 0xdead,0xbeef,cpr9
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        test_gr_gr      sp,gr20
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        set_cpr_limmed  0xdead,0xbeef,cpr8
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        set_cpr_limmed  0xbeef,0xdead,cpr9
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        inc_gr_immed    -8,sp
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        set_gr_immed    8,gr7
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        lddcu           @(sp,gr7),cpr8
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        test_cpr_limmed 0xbeef,0xdead,cpr8
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        test_cpr_limmed 0xdead,0xbeef,cpr9
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        test_gr_gr      sp,gr20
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        set_cpr_limmed  0xdead,0xbeef,cpr8
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        set_cpr_limmed  0xbeef,0xdead,cpr9
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        inc_gr_immed    8,sp
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        set_gr_immed    -8,gr7
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        lddcu           @(sp,gr7),cpr8
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        test_cpr_limmed 0xbeef,0xdead,cpr8
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        test_cpr_limmed 0xdead,0xbeef,cpr9
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        test_gr_gr      sp,gr20
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        pass

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