OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [tags/] [gdb/] [gdb-6.8/] [gdb-6.8.openrisc-2.1/] [sim/] [testsuite/] [sim/] [frv/] [parallel.exp] - Blame information for rev 33

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 24 jeremybenn
# FRV simulator testsuite.
2
 
3
if [istarget frv*-*] {
4
    # load support procs (none yet)
5
    # load_lib cgen.exp
6
    # all machines
7
    set all_machs "frv fr500 fr550 fr400"
8
    set cpu_option -mcpu
9
 
10
    # The .pcgs suffix is for "parallel cgen .s".
11
    foreach src [lsort [glob -nocomplain $srcdir/$subdir/*.pcgs]] {
12
        # If we're only testing specific files and this isn't one of them,
13
        # skip it.
14
        if ![runtest_file_p $runtests $src] {
15
            continue
16
        }
17
        run_sim_test $src $all_machs
18
    }
19
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.