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# sh testcase for addc $rm, $rn -*- Asm -*-
# mach: all
# as: -isa=shcompact
# ld: -m shelf32
 
        .include "compact/testutils.inc"
 
        # Initialise some registers with values which help us to verify
        # that the correct source registers are used by the ADDC instruction.
 
        .macro init
        mov #0, r0
        mov #1, r1
        mov #2, r2
        mov #3, r3
        mov #5, r5
        mov #15, r15
        .endm
 
        start
 
        init
add:
        clrt
        addc r0, r0
        assert r0, #0
        clrt
        addc r0, r1
        assert r1, #1
        clrt
        addc r1, r2
        assert r2, #3
        clrt
        addc r3, r5
        assert r5, #8
        clrt
        addc r5, r5
        assert r5, #16
        clrt
        addc r15, r1
        assert r1, #16
 
        init
addt:
        sett
        addc r0, r0
        assert r0, #1
        sett
        addc r0, r1
        assert r1, #3
        sett
        addc r1, r2
        assert r2, #6
        sett
        addc r3, r5
        assert r5, #9
        sett
        addc r5, r5
        assert r5, #19
        sett
        addc r15, r1
        assert r1, #19
 
        bra next
        nop
 
wrong:
        fail
 
next:
        init
large:
        clrt
        mov #1, r0
        neg r0, r0
        mov #2, r1
        addc r0, r1
        assert r1, #1
 
        init
larget:
        sett
        mov #1, r0
        neg r0, r0
        mov #2, r1
        addc r0, r1
        assert r1, #2
 
okay:
        pass

Line No.	Rev	Author	Line
1	24	jeremybenn	`# sh testcase for addc $rm, $rn -- Asm --`
2			`# mach: all`
3			`# as: -isa=shcompact`
4			`# ld: -m shelf32`
5
6			`.include "compact/testutils.inc"`
7
8			`# Initialise some registers with values which help us to verify`
9			`# that the correct source registers are used by the ADDC instruction.`
10
11			`.macro init`
12			`mov #0, r0`
13			`mov #1, r1`
14			`mov #2, r2`
15			`mov #3, r3`
16			`mov #5, r5`
17			`mov #15, r15`
18			`.endm`
19
20			`start`
21
22			`init`
23			`add:`
24			`clrt`
25			`addc r0, r0`
26			`assert r0, #0`
27			`clrt`
28			`addc r0, r1`
29			`assert r1, #1`
30			`clrt`
31			`addc r1, r2`
32			`assert r2, #3`
33			`clrt`
34			`addc r3, r5`
35			`assert r5, #8`
36			`clrt`
37			`addc r5, r5`
38			`assert r5, #16`
39			`clrt`
40			`addc r15, r1`
41			`assert r1, #16`
42
43			`init`
44			`addt:`
45			`sett`
46			`addc r0, r0`
47			`assert r0, #1`
48			`sett`
49			`addc r0, r1`
50			`assert r1, #3`
51			`sett`
52			`addc r1, r2`
53			`assert r2, #6`
54			`sett`
55			`addc r3, r5`
56			`assert r5, #9`
57			`sett`
58			`addc r5, r5`
59			`assert r5, #19`
60			`sett`
61			`addc r15, r1`
62			`assert r1, #19`
63
64			`bra next`
65			`nop`
66
67			`wrong:`
68			`fail`
69
70			`next:`
71			`init`
72			`large:`
73			`clrt`
74			`mov #1, r0`
75			`neg r0, r0`
76			`mov #2, r1`
77			`addc r0, r1`
78			`assert r1, #1`
79
80			`init`
81			`larget:`
82			`sett`
83			`mov #1, r0`
84			`neg r0, r0`
85			`mov #2, r1`
86			`addc r0, r1`
87			`assert r1, #2`
88
89			`okay:`
90			`pass`

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[/] [openrisc/] [tags/] [gdb/] [gdb-6.8/] [gdb-6.8.openrisc-2.1/] [sim/] [testsuite/] [sim/] [sh64/] [compact/] [addc.cgs] - Blame information for rev 33