Subversion Repositories openrisc_2011-10-31

/* Copyright (C) 1997, 1998, 1999, 2000, 2001, 2003, 2004, 2005, 2006, 2007,

   2008, 2009  Free Software Foundation, Inc.

   Contributed by Red Hat, Inc.

This file is part of GCC.

GCC is free software; you can redistribute it and/or modify

it under the terms of the GNU General Public License as published by

the Free Software Foundation; either version 3, or (at your option)

any later version.

GCC is distributed in the hope that it will be useful,

but WITHOUT ANY WARRANTY; without even the implied warranty of

MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

GNU General Public License for more details.

You should have received a copy of the GNU General Public License

along with GCC; see the file COPYING3.  If not see

<http://www.gnu.org/licenses/>.  */

#include "config.h"

#include "system.h"

#include "coretypes.h"

#include "tm.h"

#include "rtl.h"

#include "tree.h"

#include "regs.h"

#include "hard-reg-set.h"

#include "real.h"

#include "insn-config.h"

#include "conditions.h"

#include "insn-flags.h"

#include "output.h"

#include "insn-attr.h"

#include "flags.h"

#include "recog.h"

#include "reload.h"

#include "expr.h"

#include "obstack.h"

#include "except.h"

#include "function.h"

#include "optabs.h"

#include "toplev.h"

#include "basic-block.h"

#include "tm_p.h"

#include "ggc.h"

#include <ctype.h>

#include "target.h"

#include "target-def.h"

#include "targhooks.h"

#include "integrate.h"

#include "langhooks.h"

#include "df.h"

#ifndef FRV_INLINE

#define FRV_INLINE inline

#endif

/* The maximum number of distinct NOP patterns.  There are three:

   nop, fnop and mnop.  */

#define NUM_NOP_PATTERNS 3

/* Classification of instructions and units: integer, floating-point/media,

   branch and control.  */

enum frv_insn_group { GROUP_I, GROUP_FM, GROUP_B, GROUP_C, NUM_GROUPS };

/* The DFA names of the units, in packet order.  */

static const char *const frv_unit_names[] =

{

  "c",

  "i0", "f0",

  "i1", "f1",

  "i2", "f2",

  "i3", "f3",

  "b0", "b1"

};

/* The classification of each unit in frv_unit_names[].  */

static const enum frv_insn_group frv_unit_groups[ARRAY_SIZE (frv_unit_names)] =

{

  GROUP_C,

  GROUP_I, GROUP_FM,

  GROUP_I, GROUP_FM,

  GROUP_I, GROUP_FM,

  GROUP_I, GROUP_FM,

  GROUP_B, GROUP_B

};

/* Return the DFA unit code associated with the Nth unit of integer

   or floating-point group GROUP,  */

#define NTH_UNIT(GROUP, N) frv_unit_codes[(GROUP) + (N) * 2 + 1]

/* Return the number of integer or floating-point unit UNIT

   (1 for I1, 2 for F2, etc.).  */

#define UNIT_NUMBER(UNIT) (((UNIT) - 1) / 2)

/* The DFA unit number for each unit in frv_unit_names[].  */

static int frv_unit_codes[ARRAY_SIZE (frv_unit_names)];

/* FRV_TYPE_TO_UNIT[T] is the last unit in frv_unit_names[] that can issue

   an instruction of type T.  The value is ARRAY_SIZE (frv_unit_names) if

   no instruction of type T has been seen.  */

static unsigned int frv_type_to_unit[TYPE_UNKNOWN + 1];

/* An array of dummy nop INSNs, one for each type of nop that the

   target supports.  */

static GTY(()) rtx frv_nops[NUM_NOP_PATTERNS];

/* The number of nop instructions in frv_nops[].  */

static unsigned int frv_num_nops;

/* Information about one __builtin_read or __builtin_write access, or

   the combination of several such accesses.  The most general value

   is all-zeros (an unknown access to an unknown address).  */

struct frv_io {

  /* The type of access.  FRV_IO_UNKNOWN means the access can be either

     a read or a write.  */

  enum { FRV_IO_UNKNOWN, FRV_IO_READ, FRV_IO_WRITE } type;

  /* The constant address being accessed, or zero if not known.  */

  HOST_WIDE_INT const_address;

  /* The run-time address, as used in operand 0 of the membar pattern.  */

  rtx var_address;

};

/* Return true if instruction INSN should be packed with the following

   instruction.  */

#define PACKING_FLAG_P(INSN) (GET_MODE (INSN) == TImode)

/* Set the value of PACKING_FLAG_P(INSN).  */

#define SET_PACKING_FLAG(INSN) PUT_MODE (INSN, TImode)

#define CLEAR_PACKING_FLAG(INSN) PUT_MODE (INSN, VOIDmode)

/* Loop with REG set to each hard register in rtx X.  */

#define FOR_EACH_REGNO(REG, X)                                          \

  for (REG = REGNO (X);                                                 \

       REG < REGNO (X) + HARD_REGNO_NREGS (REGNO (X), GET_MODE (X));    \

       REG++)

/* This structure contains machine specific function data.  */

struct GTY(()) machine_function

{

  /* True if we have created an rtx that relies on the stack frame.  */

  int frame_needed;

  /* True if this function contains at least one __builtin_{read,write}*.  */

  bool has_membar_p;

};

/* Temporary register allocation support structure.  */

typedef struct frv_tmp_reg_struct

  {

    HARD_REG_SET regs;          /* possible registers to allocate */

    int next_reg[N_REG_CLASSES];        /* next register to allocate per class */

  }

frv_tmp_reg_t;

/* Register state information for VLIW re-packing phase.  */

#define REGSTATE_CC_MASK        0x07    /* Mask to isolate CCn for cond exec */

#define REGSTATE_MODIFIED       0x08    /* reg modified in current VLIW insn */

#define REGSTATE_IF_TRUE        0x10    /* reg modified in cond exec true */

#define REGSTATE_IF_FALSE       0x20    /* reg modified in cond exec false */

#define REGSTATE_IF_EITHER      (REGSTATE_IF_TRUE | REGSTATE_IF_FALSE)

typedef unsigned char regstate_t;

/* Used in frv_frame_accessor_t to indicate the direction of a register-to-

   memory move.  */

enum frv_stack_op

{

  FRV_LOAD,

  FRV_STORE

};

/* Information required by frv_frame_access.  */

typedef struct

{

  /* This field is FRV_LOAD if registers are to be loaded from the stack and

     FRV_STORE if they should be stored onto the stack.  FRV_STORE implies

     the move is being done by the prologue code while FRV_LOAD implies it

     is being done by the epilogue.  */

  enum frv_stack_op op;

  /* The base register to use when accessing the stack.  This may be the

     frame pointer, stack pointer, or a temporary.  The choice of register

     depends on which part of the frame is being accessed and how big the

     frame is.  */

  rtx base;

  /* The offset of BASE from the bottom of the current frame, in bytes.  */

  int base_offset;

} frv_frame_accessor_t;

/* Conditional execution support gathered together in one structure.  */

typedef struct

  {

    /* Linked list of insns to add if the conditional execution conversion was

       successful.  Each link points to an EXPR_LIST which points to the pattern

       of the insn to add, and the insn to be inserted before.  */

    rtx added_insns_list;

    /* Identify which registers are safe to allocate for if conversions to

       conditional execution.  We keep the last allocated register in the

       register classes between COND_EXEC statements.  This will mean we allocate

       different registers for each different COND_EXEC group if we can.  This

       might allow the scheduler to intermix two different COND_EXEC sections.  */

    frv_tmp_reg_t tmp_reg;

    /* For nested IFs, identify which CC registers are used outside of setting

       via a compare isnsn, and using via a check insn.  This will allow us to

       know if we can rewrite the register to use a different register that will

       be paired with the CR register controlling the nested IF-THEN blocks.  */

    HARD_REG_SET nested_cc_ok_rewrite;

    /* Temporary registers allocated to hold constants during conditional

       execution.  */

    rtx scratch_regs[FIRST_PSEUDO_REGISTER];

    /* Current number of temp registers available.  */

    int cur_scratch_regs;

    /* Number of nested conditional execution blocks.  */

    int num_nested_cond_exec;

    /* Map of insns that set up constants in scratch registers.  */

    bitmap scratch_insns_bitmap;

    /* Conditional execution test register (CC0..CC7).  */

    rtx cr_reg;

    /* Conditional execution compare register that is paired with cr_reg, so that

       nested compares can be done.  The csubcc and caddcc instructions don't

       have enough bits to specify both a CC register to be set and a CR register

       to do the test on, so the same bit number is used for both.  Needless to

       say, this is rather inconvenient for GCC.  */

    rtx nested_cc_reg;

    /* Extra CR registers used for &&, ||.  */

    rtx extra_int_cr;

    rtx extra_fp_cr;

    /* Previous CR used in nested if, to make sure we are dealing with the same

       nested if as the previous statement.  */

    rtx last_nested_if_cr;

  }

frv_ifcvt_t;

static /* GTY(()) */ frv_ifcvt_t frv_ifcvt;

/* Map register number to smallest register class.  */

enum reg_class regno_reg_class[FIRST_PSEUDO_REGISTER];

/* Map class letter into register class.  */

enum reg_class reg_class_from_letter[256];

/* Cached value of frv_stack_info.  */

static frv_stack_t *frv_stack_cache = (frv_stack_t *)0;

/* -mcpu= support */

frv_cpu_t frv_cpu_type = CPU_TYPE;      /* value of -mcpu= */

/* Forward references */

static bool frv_handle_option                   (size_t, const char *, int);

static bool frv_legitimate_address_p            (enum machine_mode, rtx, bool);

static int frv_default_flags_for_cpu            (void);

static int frv_string_begins_with               (const_tree, const char *);

static FRV_INLINE bool frv_small_data_reloc_p   (rtx, int);

static void frv_print_operand_memory_reference_reg

                                                (FILE *, rtx);

static void frv_print_operand_memory_reference  (FILE *, rtx, int);

static int frv_print_operand_jump_hint          (rtx);

static const char *comparison_string            (enum rtx_code, rtx);

static rtx frv_function_value                   (const_tree, const_tree,

                                                 bool);

static rtx frv_libcall_value                    (enum machine_mode,

                                                 const_rtx);

static FRV_INLINE int frv_regno_ok_for_base_p   (int, int);

static rtx single_set_pattern                   (rtx);

static int frv_function_contains_far_jump       (void);

static rtx frv_alloc_temp_reg                   (frv_tmp_reg_t *,

                                                 enum reg_class,

                                                 enum machine_mode,

                                                 int, int);

static rtx frv_frame_offset_rtx                 (int);

static rtx frv_frame_mem                        (enum machine_mode, rtx, int);

static rtx frv_dwarf_store                      (rtx, int);

static void frv_frame_insn                      (rtx, rtx);

static void frv_frame_access                    (frv_frame_accessor_t*,

                                                 rtx, int);

static void frv_frame_access_multi              (frv_frame_accessor_t*,

                                                 frv_stack_t *, int);

static void frv_frame_access_standard_regs      (enum frv_stack_op,

                                                 frv_stack_t *);

static struct machine_function *frv_init_machine_status         (void);

static rtx frv_int_to_acc                       (enum insn_code, int, rtx);

static enum machine_mode frv_matching_accg_mode (enum machine_mode);

static rtx frv_read_argument                    (tree, unsigned int);

static rtx frv_read_iacc_argument               (enum machine_mode, tree, unsigned int);

static int frv_check_constant_argument          (enum insn_code, int, rtx);

static rtx frv_legitimize_target                (enum insn_code, rtx);

static rtx frv_legitimize_argument              (enum insn_code, int, rtx);

static rtx frv_legitimize_tls_address           (rtx, enum tls_model);

static rtx frv_legitimize_address               (rtx, rtx, enum machine_mode);

static rtx frv_expand_set_builtin               (enum insn_code, tree, rtx);

static rtx frv_expand_unop_builtin              (enum insn_code, tree, rtx);

static rtx frv_expand_binop_builtin             (enum insn_code, tree, rtx);

static rtx frv_expand_cut_builtin               (enum insn_code, tree, rtx);

static rtx frv_expand_binopimm_builtin          (enum insn_code, tree, rtx);

static rtx frv_expand_voidbinop_builtin         (enum insn_code, tree);

static rtx frv_expand_int_void2arg              (enum insn_code, tree);

static rtx frv_expand_prefetches                (enum insn_code, tree);

static rtx frv_expand_voidtriop_builtin         (enum insn_code, tree);

static rtx frv_expand_voidaccop_builtin         (enum insn_code, tree);

static rtx frv_expand_mclracc_builtin           (tree);

static rtx frv_expand_mrdacc_builtin            (enum insn_code, tree);

static rtx frv_expand_mwtacc_builtin            (enum insn_code, tree);

static rtx frv_expand_noargs_builtin            (enum insn_code);

static void frv_split_iacc_move                 (rtx, rtx);

static rtx frv_emit_comparison                  (enum rtx_code, rtx, rtx);

static int frv_clear_registers_used             (rtx *, void *);

static void frv_ifcvt_add_insn                  (rtx, rtx, int);

static rtx frv_ifcvt_rewrite_mem                (rtx, enum machine_mode, rtx);

static rtx frv_ifcvt_load_value                 (rtx, rtx);

static int frv_acc_group_1                      (rtx *, void *);

static unsigned int frv_insn_unit               (rtx);

static bool frv_issues_to_branch_unit_p         (rtx);

static int frv_cond_flags                       (rtx);

static bool frv_regstate_conflict_p             (regstate_t, regstate_t);

static int frv_registers_conflict_p_1           (rtx *, void *);

static bool frv_registers_conflict_p            (rtx);

static void frv_registers_update_1              (rtx, const_rtx, void *);

static void frv_registers_update                (rtx);

static void frv_start_packet                    (void);

static void frv_start_packet_block              (void);

static void frv_finish_packet                   (void (*) (void));

static bool frv_pack_insn_p                     (rtx);

static void frv_add_insn_to_packet              (rtx);

static void frv_insert_nop_in_packet            (rtx);

static bool frv_for_each_packet                 (void (*) (void));

static bool frv_sort_insn_group_1               (enum frv_insn_group,

                                                 unsigned int, unsigned int,

                                                 unsigned int, unsigned int,

                                                 state_t);

static int frv_compare_insns                    (const void *, const void *);

static void frv_sort_insn_group                 (enum frv_insn_group);

static void frv_reorder_packet                  (void);

static void frv_fill_unused_units               (enum frv_insn_group);

static void frv_align_label                     (void);

static void frv_reorg_packet                    (void);

static void frv_register_nop                    (rtx);

static void frv_reorg                           (void);

static void frv_pack_insns                      (void);

static void frv_function_prologue               (FILE *, HOST_WIDE_INT);

static void frv_function_epilogue               (FILE *, HOST_WIDE_INT);

static bool frv_assemble_integer                (rtx, unsigned, int);

static void frv_init_builtins                   (void);

static rtx frv_expand_builtin                   (tree, rtx, rtx, enum machine_mode, int);

static void frv_init_libfuncs                   (void);

static bool frv_in_small_data_p                 (const_tree);

static void frv_asm_output_mi_thunk

  (FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT, tree);

static void frv_setup_incoming_varargs          (CUMULATIVE_ARGS *,

                                                 enum machine_mode,

                                                 tree, int *, int);

static rtx frv_expand_builtin_saveregs          (void);

static void frv_expand_builtin_va_start         (tree, rtx);

static bool frv_rtx_costs                       (rtx, int, int, int*, bool);

static void frv_asm_out_constructor             (rtx, int);

static void frv_asm_out_destructor              (rtx, int);

static bool frv_function_symbol_referenced_p    (rtx);

static bool frv_cannot_force_const_mem          (rtx);

static const char *unspec_got_name              (int);

static void frv_output_const_unspec             (FILE *,

                                                 const struct frv_unspec *);

static bool frv_function_ok_for_sibcall         (tree, tree);

static rtx frv_struct_value_rtx                 (tree, int);

static bool frv_must_pass_in_stack (enum machine_mode mode, const_tree type);

static int frv_arg_partial_bytes (CUMULATIVE_ARGS *, enum machine_mode,

                                  tree, bool);

static void frv_output_dwarf_dtprel             (FILE *, int, rtx)

  ATTRIBUTE_UNUSED;

static bool frv_secondary_reload                (bool, rtx, enum reg_class,

                                                 enum machine_mode,

                                                 secondary_reload_info *);

static bool frv_frame_pointer_required          (void);

static bool frv_can_eliminate                   (const int, const int);

static void frv_trampoline_init                 (rtx, tree, rtx);

/* Allow us to easily change the default for -malloc-cc.  */

#ifndef DEFAULT_NO_ALLOC_CC

#define MASK_DEFAULT_ALLOC_CC   MASK_ALLOC_CC

#else

#define MASK_DEFAULT_ALLOC_CC   0

#endif

/* Initialize the GCC target structure.  */

#undef  TARGET_ASM_FUNCTION_PROLOGUE

#define TARGET_ASM_FUNCTION_PROLOGUE frv_function_prologue

#undef  TARGET_ASM_FUNCTION_EPILOGUE

#define TARGET_ASM_FUNCTION_EPILOGUE frv_function_epilogue

#undef  TARGET_ASM_INTEGER

#define TARGET_ASM_INTEGER frv_assemble_integer

#undef TARGET_DEFAULT_TARGET_FLAGS

#define TARGET_DEFAULT_TARGET_FLAGS             \

  (MASK_DEFAULT_ALLOC_CC                        \

   | MASK_COND_MOVE                             \

   | MASK_SCC                                   \

   | MASK_COND_EXEC                             \

   | MASK_VLIW_BRANCH                           \

   | MASK_MULTI_CE                              \

   | MASK_NESTED_CE)

#undef TARGET_HANDLE_OPTION

#define TARGET_HANDLE_OPTION frv_handle_option

#undef TARGET_INIT_BUILTINS

#define TARGET_INIT_BUILTINS frv_init_builtins

#undef TARGET_EXPAND_BUILTIN

#define TARGET_EXPAND_BUILTIN frv_expand_builtin

#undef TARGET_INIT_LIBFUNCS

#define TARGET_INIT_LIBFUNCS frv_init_libfuncs

#undef TARGET_IN_SMALL_DATA_P

#define TARGET_IN_SMALL_DATA_P frv_in_small_data_p

#undef TARGET_RTX_COSTS

#define TARGET_RTX_COSTS frv_rtx_costs

#undef TARGET_ASM_CONSTRUCTOR

#define TARGET_ASM_CONSTRUCTOR frv_asm_out_constructor

#undef TARGET_ASM_DESTRUCTOR

#define TARGET_ASM_DESTRUCTOR frv_asm_out_destructor

#undef TARGET_ASM_OUTPUT_MI_THUNK

#define TARGET_ASM_OUTPUT_MI_THUNK frv_asm_output_mi_thunk

#undef TARGET_ASM_CAN_OUTPUT_MI_THUNK

#define TARGET_ASM_CAN_OUTPUT_MI_THUNK default_can_output_mi_thunk_no_vcall

#undef  TARGET_SCHED_ISSUE_RATE

#define TARGET_SCHED_ISSUE_RATE frv_issue_rate

#undef TARGET_LEGITIMIZE_ADDRESS

#define TARGET_LEGITIMIZE_ADDRESS frv_legitimize_address

#undef TARGET_FUNCTION_OK_FOR_SIBCALL

#define TARGET_FUNCTION_OK_FOR_SIBCALL frv_function_ok_for_sibcall

#undef TARGET_CANNOT_FORCE_CONST_MEM

#define TARGET_CANNOT_FORCE_CONST_MEM frv_cannot_force_const_mem

#undef TARGET_HAVE_TLS

#define TARGET_HAVE_TLS HAVE_AS_TLS

#undef TARGET_STRUCT_VALUE_RTX

#define TARGET_STRUCT_VALUE_RTX frv_struct_value_rtx

#undef TARGET_MUST_PASS_IN_STACK

#define TARGET_MUST_PASS_IN_STACK frv_must_pass_in_stack

#undef TARGET_PASS_BY_REFERENCE

#define TARGET_PASS_BY_REFERENCE hook_pass_by_reference_must_pass_in_stack

#undef TARGET_ARG_PARTIAL_BYTES

#define TARGET_ARG_PARTIAL_BYTES frv_arg_partial_bytes

#undef TARGET_EXPAND_BUILTIN_SAVEREGS

#define TARGET_EXPAND_BUILTIN_SAVEREGS frv_expand_builtin_saveregs

#undef TARGET_SETUP_INCOMING_VARARGS

#define TARGET_SETUP_INCOMING_VARARGS frv_setup_incoming_varargs

#undef TARGET_MACHINE_DEPENDENT_REORG

#define TARGET_MACHINE_DEPENDENT_REORG frv_reorg

#undef TARGET_EXPAND_BUILTIN_VA_START

#define TARGET_EXPAND_BUILTIN_VA_START frv_expand_builtin_va_start

#if HAVE_AS_TLS

#undef TARGET_ASM_OUTPUT_DWARF_DTPREL

#define TARGET_ASM_OUTPUT_DWARF_DTPREL frv_output_dwarf_dtprel

#endif

#undef  TARGET_SECONDARY_RELOAD

#define TARGET_SECONDARY_RELOAD frv_secondary_reload

#undef TARGET_LEGITIMATE_ADDRESS_P

#define TARGET_LEGITIMATE_ADDRESS_P frv_legitimate_address_p

#undef TARGET_FRAME_POINTER_REQUIRED

#define TARGET_FRAME_POINTER_REQUIRED frv_frame_pointer_required

#undef TARGET_CAN_ELIMINATE

#define TARGET_CAN_ELIMINATE frv_can_eliminate

#undef TARGET_TRAMPOLINE_INIT

#define TARGET_TRAMPOLINE_INIT frv_trampoline_init

#undef TARGET_FUNCTION_VALUE

#define TARGET_FUNCTION_VALUE frv_function_value

#undef TARGET_LIBCALL_VALUE

#define TARGET_LIBCALL_VALUE frv_libcall_value

struct gcc_target targetm = TARGET_INITIALIZER;

#define FRV_SYMBOL_REF_TLS_P(RTX) \

  (GET_CODE (RTX) == SYMBOL_REF && SYMBOL_REF_TLS_MODEL (RTX) != 0)

/* Any function call that satisfies the machine-independent

   requirements is eligible on FR-V.  */

static bool

frv_function_ok_for_sibcall (tree decl ATTRIBUTE_UNUSED,

                             tree exp ATTRIBUTE_UNUSED)

{

  return true;

}

/* Return true if SYMBOL is a small data symbol and relocation RELOC

   can be used to access it directly in a load or store.  */

static FRV_INLINE bool

frv_small_data_reloc_p (rtx symbol, int reloc)

{

  return (GET_CODE (symbol) == SYMBOL_REF

          && SYMBOL_REF_SMALL_P (symbol)

          && (!TARGET_FDPIC || flag_pic == 1)

          && (reloc == R_FRV_GOTOFF12 || reloc == R_FRV_GPREL12));

}

/* Return true if X is a valid relocation unspec.  If it is, fill in UNSPEC

   appropriately.  */

bool

frv_const_unspec_p (rtx x, struct frv_unspec *unspec)

{

  if (GET_CODE (x) == CONST)

    {

      unspec->offset = 0;

      x = XEXP (x, 0);

      if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == CONST_INT)

        {

          unspec->offset += INTVAL (XEXP (x, 1));

          x = XEXP (x, 0);

        }

      if (GET_CODE (x) == UNSPEC && XINT (x, 1) == UNSPEC_GOT)

        {

          unspec->symbol = XVECEXP (x, 0, 0);

          unspec->reloc = INTVAL (XVECEXP (x, 0, 1));

          if (unspec->offset == 0)

            return true;

          if (frv_small_data_reloc_p (unspec->symbol, unspec->reloc)

              && unspec->offset > 0

              && (unsigned HOST_WIDE_INT) unspec->offset < g_switch_value)

            return true;

        }

    }

  return false;

}

/* Decide whether we can force certain constants to memory.  If we

   decide we can't, the caller should be able to cope with it in

   another way.

   We never allow constants to be forced into memory for TARGET_FDPIC.

   This is necessary for several reasons:

   1. Since LEGITIMATE_CONSTANT_P rejects constant pool addresses, the

      target-independent code will try to force them into the constant

      pool, thus leading to infinite recursion.

   2. We can never introduce new constant pool references during reload.

      Any such reference would require use of the pseudo FDPIC register.

   3. We can't represent a constant added to a function pointer (which is

      not the same as a pointer to a function+constant).

   4. In many cases, it's more efficient to calculate the constant in-line.  */

static bool

frv_cannot_force_const_mem (rtx x ATTRIBUTE_UNUSED)

{

  return TARGET_FDPIC;

}

/* Implement TARGET_HANDLE_OPTION.  */

static bool

frv_handle_option (size_t code, const char *arg, int value ATTRIBUTE_UNUSED)

{

  switch (code)

    {

    case OPT_mcpu_:

      if (strcmp (arg, "simple") == 0)

        frv_cpu_type = FRV_CPU_SIMPLE;

      else if (strcmp (arg, "tomcat") == 0)

        frv_cpu_type = FRV_CPU_TOMCAT;

      else if (strcmp (arg, "fr550") == 0)

        frv_cpu_type = FRV_CPU_FR550;

      else if (strcmp (arg, "fr500") == 0)

        frv_cpu_type = FRV_CPU_FR500;

      else if (strcmp (arg, "fr450") == 0)

        frv_cpu_type = FRV_CPU_FR450;

      else if (strcmp (arg, "fr405") == 0)

        frv_cpu_type = FRV_CPU_FR405;

      else if (strcmp (arg, "fr400") == 0)

        frv_cpu_type = FRV_CPU_FR400;

      else if (strcmp (arg, "fr300") == 0)

        frv_cpu_type = FRV_CPU_FR300;

      else if (strcmp (arg, "frv") == 0)

        frv_cpu_type = FRV_CPU_GENERIC;

      else

        return false;

      return true;

    default:

      return true;

    }

}

static int

frv_default_flags_for_cpu (void)

{

  switch (frv_cpu_type)

    {

    case FRV_CPU_GENERIC:

      return MASK_DEFAULT_FRV;

    case FRV_CPU_FR550:

      return MASK_DEFAULT_FR550;

    case FRV_CPU_FR500:

    case FRV_CPU_TOMCAT:

      return MASK_DEFAULT_FR500;

    case FRV_CPU_FR450:

      return MASK_DEFAULT_FR450;

    case FRV_CPU_FR405:

    case FRV_CPU_FR400:

      return MASK_DEFAULT_FR400;

    case FRV_CPU_FR300:

    case FRV_CPU_SIMPLE:

      return MASK_DEFAULT_SIMPLE;

    default:

      gcc_unreachable ();

    }

}

/* Sometimes certain combinations of command options do not make

   sense on a particular target machine.  You can define a macro

   `OVERRIDE_OPTIONS' to take account of this.  This macro, if

   defined, is executed once just after all the command options have

   been parsed.

   Don't use this macro to turn on various extra optimizations for

   `-O'.  That is what `OPTIMIZATION_OPTIONS' is for.  */

void

frv_override_options (void)

{

  int regno;

  unsigned int i;

  target_flags |= (frv_default_flags_for_cpu () & ~target_flags_explicit);

  /* -mlibrary-pic sets -fPIC and -G0 and also suppresses warnings from the

     linker about linking pic and non-pic code.  */

  if (TARGET_LIBPIC)

    {

      if (!flag_pic)            /* -fPIC */

        flag_pic = 2;

      if (! g_switch_set)       /* -G0 */

        {

          g_switch_set = 1;

          g_switch_value = 0;

        }

    }

  /* A C expression whose value is a register class containing hard

     register REGNO.  In general there is more than one such class;

     choose a class which is "minimal", meaning that no smaller class

     also contains the register.  */

  for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)

    {

      enum reg_class rclass;

      if (GPR_P (regno))

        {

          int gpr_reg = regno - GPR_FIRST;

          if (gpr_reg == GR8_REG)

            rclass = GR8_REGS;

          else if (gpr_reg == GR9_REG)

            rclass = GR9_REGS;

          else if (gpr_reg == GR14_REG)

            rclass = FDPIC_FPTR_REGS;

          else if (gpr_reg == FDPIC_REGNO)

            rclass = FDPIC_REGS;

          else if ((gpr_reg & 3) == 0)

            rclass = QUAD_REGS;

          else if ((gpr_reg & 1) == 0)

            rclass = EVEN_REGS;

          else

            rclass = GPR_REGS;