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jeremybenn |
; Options for the IA-32 and AMD64 ports of the compiler.
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; Copyright (C) 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
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;
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; This file is part of GCC.
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;
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; GCC is free software; you can redistribute it and/or modify it under
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; the terms of the GNU General Public License as published by the Free
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; Software Foundation; either version 3, or (at your option) any later
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; version.
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;
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; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
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; WARRANTY; without even the implied warranty of MERCHANTABILITY or
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; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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; for more details.
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;
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; You should have received a copy of the GNU General Public License
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; along with GCC; see the file COPYING3. If not see
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; .
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;; Definitions to add to the cl_target_option structure
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;; -march= processor
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TargetSave
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unsigned char arch
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;; -mtune= processor
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TargetSave
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unsigned char tune
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;; -mfpath=
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TargetSave
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unsigned char fpmath
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;; CPU schedule model
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TargetSave
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unsigned char schedule
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;; branch cost
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TargetSave
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unsigned char branch_cost
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;; which flags were passed by the user
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TargetSave
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int ix86_isa_flags_explicit
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;; which flags were passed by the user
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TargetSave
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int target_flags_explicit
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;; whether -mtune was not specified
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TargetSave
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unsigned char tune_defaulted
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;; whether -march was specified
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TargetSave
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unsigned char arch_specified
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;; x86 options
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m128bit-long-double
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Target RejectNegative Report Mask(128BIT_LONG_DOUBLE) Save
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sizeof(long double) is 16
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m80387
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Target Report Mask(80387) Save
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Use hardware fp
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m96bit-long-double
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Target RejectNegative Report InverseMask(128BIT_LONG_DOUBLE) Save
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sizeof(long double) is 12
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maccumulate-outgoing-args
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Target Report Mask(ACCUMULATE_OUTGOING_ARGS) Save
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Reserve space for outgoing arguments in the function prologue
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malign-double
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Target Report Mask(ALIGN_DOUBLE) Save
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Align some doubles on dword boundary
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malign-functions=
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Target RejectNegative Joined Var(ix86_align_funcs_string)
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Function starts are aligned to this power of 2
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malign-jumps=
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Target RejectNegative Joined Var(ix86_align_jumps_string)
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Jump targets are aligned to this power of 2
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malign-loops=
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Target RejectNegative Joined Var(ix86_align_loops_string)
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Loop code aligned to this power of 2
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malign-stringops
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Target RejectNegative Report InverseMask(NO_ALIGN_STRINGOPS, ALIGN_STRINGOPS) Save
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Align destination of the string operations
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march=
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Target RejectNegative Joined Var(ix86_arch_string)
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Generate code for given CPU
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masm=
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Target RejectNegative Joined Var(ix86_asm_string)
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Use given assembler dialect
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mbranch-cost=
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Target RejectNegative Joined Var(ix86_branch_cost_string)
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Branches are this expensive (1-5, arbitrary units)
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mlarge-data-threshold=
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Target RejectNegative Joined Var(ix86_section_threshold_string)
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Data greater than given threshold will go into .ldata section in x86-64 medium model
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mcmodel=
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Target RejectNegative Joined Var(ix86_cmodel_string)
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Use given x86-64 code model
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mfancy-math-387
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Target RejectNegative Report InverseMask(NO_FANCY_MATH_387, USE_FANCY_MATH_387) Save
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Generate sin, cos, sqrt for FPU
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mforce-drap
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Target Report Var(ix86_force_drap)
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Always use Dynamic Realigned Argument Pointer (DRAP) to realign stack
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mfp-ret-in-387
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Target Report Mask(FLOAT_RETURNS) Save
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Return values of functions in FPU registers
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mfpmath=
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Target RejectNegative Joined Var(ix86_fpmath_string)
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Generate floating point mathematics using given instruction set
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mhard-float
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Target RejectNegative Mask(80387) MaskExists Save
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Use hardware fp
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mieee-fp
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Target Report Mask(IEEE_FP) Save
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Use IEEE math for fp comparisons
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minline-all-stringops
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Target Report Mask(INLINE_ALL_STRINGOPS) Save
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Inline all known string operations
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minline-stringops-dynamically
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Target Report Mask(INLINE_STRINGOPS_DYNAMICALLY) Save
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Inline memset/memcpy string operations, but perform inline version only for small blocks
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mintel-syntax
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Target Undocumented
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;; Deprecated
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mms-bitfields
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Target Report Mask(MS_BITFIELD_LAYOUT) Save
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Use native (MS) bitfield layout
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mno-align-stringops
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Target RejectNegative Report Mask(NO_ALIGN_STRINGOPS) Undocumented Save
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mno-fancy-math-387
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Target RejectNegative Report Mask(NO_FANCY_MATH_387) Undocumented Save
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mno-push-args
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Target RejectNegative Report Mask(NO_PUSH_ARGS) Undocumented Save
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mno-red-zone
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Target RejectNegative Report Mask(NO_RED_ZONE) Undocumented Save
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momit-leaf-frame-pointer
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Target Report Mask(OMIT_LEAF_FRAME_POINTER) Save
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Omit the frame pointer in leaf functions
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mpc
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Target RejectNegative Report Joined Var(ix87_precision_string)
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Set 80387 floating-point precision (-mpc32, -mpc64, -mpc80)
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mpreferred-stack-boundary=
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Target RejectNegative Joined Var(ix86_preferred_stack_boundary_string)
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Attempt to keep stack aligned to this power of 2
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mincoming-stack-boundary=
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Target RejectNegative Joined Var(ix86_incoming_stack_boundary_string)
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Assume incoming stack aligned to this power of 2
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mpush-args
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Target Report InverseMask(NO_PUSH_ARGS, PUSH_ARGS) Save
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Use push instructions to save outgoing arguments
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mred-zone
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Target RejectNegative Report InverseMask(NO_RED_ZONE, RED_ZONE) Save
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Use red-zone in the x86-64 code
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mregparm=
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Target RejectNegative Joined Var(ix86_regparm_string)
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Number of registers used to pass integer arguments
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mrtd
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Target Report Mask(RTD) Save
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Alternate calling convention
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msoft-float
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Target InverseMask(80387) Save
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Do not use hardware fp
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msseregparm
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Target RejectNegative Mask(SSEREGPARM) Save
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Use SSE register passing conventions for SF and DF mode
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mstackrealign
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Target Report Var(ix86_force_align_arg_pointer) Init(-1)
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Realign stack in prologue
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mstack-arg-probe
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Target Report Mask(STACK_PROBE) Save
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Enable stack probing
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mstringop-strategy=
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Target RejectNegative Joined Var(ix86_stringop_string)
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Chose strategy to generate stringop using
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mtls-dialect=
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Target RejectNegative Joined Var(ix86_tls_dialect_string)
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Use given thread-local storage dialect
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mtls-direct-seg-refs
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Target Report Mask(TLS_DIRECT_SEG_REFS)
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Use direct references against %gs when accessing tls data
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mtune=
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Target RejectNegative Joined Var(ix86_tune_string)
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Schedule code for given CPU
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mabi=
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Target RejectNegative Joined Var(ix86_abi_string)
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Generate code that conforms to the given ABI
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mveclibabi=
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Target RejectNegative Joined Var(ix86_veclibabi_string)
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Vector library ABI to use
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mrecip
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Target Report Mask(RECIP) Save
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Generate reciprocals instead of divss and sqrtss.
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mcld
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Target Report Mask(CLD) Save
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Generate cld instruction in the function prologue.
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mfused-madd
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Target Report Mask(FUSED_MADD) Save
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Enable automatic generation of fused floating point multiply-add instructions
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if the ISA supports such instructions. The -mfused-madd option is on by
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default.
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;; ISA support
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m32
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Target RejectNegative Negative(m64) Report InverseMask(ISA_64BIT) Var(ix86_isa_flags) VarExists Save
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Generate 32bit i386 code
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m64
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Target RejectNegative Negative(m32) Report Mask(ISA_64BIT) Var(ix86_isa_flags) VarExists Save
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Generate 64bit x86-64 code
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mmmx
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Target Report Mask(ISA_MMX) Var(ix86_isa_flags) VarExists Save
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Support MMX built-in functions
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m3dnow
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Target Report Mask(ISA_3DNOW) Var(ix86_isa_flags) VarExists Save
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Support 3DNow! built-in functions
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m3dnowa
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Target Undocumented Mask(ISA_3DNOW_A) Var(ix86_isa_flags) VarExists Save
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Support Athlon 3Dnow! built-in functions
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msse
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Target Report Mask(ISA_SSE) Var(ix86_isa_flags) VarExists Save
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Support MMX and SSE built-in functions and code generation
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msse2
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Target Report Mask(ISA_SSE2) Var(ix86_isa_flags) VarExists Save
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Support MMX, SSE and SSE2 built-in functions and code generation
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msse3
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Target Report Mask(ISA_SSE3) Var(ix86_isa_flags) VarExists Save
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Support MMX, SSE, SSE2 and SSE3 built-in functions and code generation
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mssse3
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Target Report Mask(ISA_SSSE3) Var(ix86_isa_flags) VarExists Save
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Support MMX, SSE, SSE2, SSE3 and SSSE3 built-in functions and code generation
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msse4.1
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Target Report Mask(ISA_SSE4_1) Var(ix86_isa_flags) VarExists Save
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Support MMX, SSE, SSE2, SSE3, SSSE3 and SSE4.1 built-in functions and code generation
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msse4.2
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Target Report Mask(ISA_SSE4_2) Var(ix86_isa_flags) VarExists Save
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Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 and SSE4.2 built-in functions and code generation
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msse4
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Target RejectNegative Report Mask(ISA_SSE4_2) MaskExists Var(ix86_isa_flags) VarExists Save
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Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 and SSE4.2 built-in functions and code generation
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mno-sse4
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Target RejectNegative Report InverseMask(ISA_SSE4_1) MaskExists Var(ix86_isa_flags) VarExists Save
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Do not support SSE4.1 and SSE4.2 built-in functions and code generation
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mavx
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Target Report Mask(ISA_AVX) Var(ix86_isa_flags) VarExists
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Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2 and AVX built-in functions and code generation
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mfma
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Target Report Mask(ISA_FMA) Var(ix86_isa_flags) VarExists
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Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX and FMA built-in functions and code generation
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msse4a
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Target Report Mask(ISA_SSE4A) Var(ix86_isa_flags) VarExists Save
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Support MMX, SSE, SSE2, SSE3 and SSE4A built-in functions and code generation
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mfma4
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Target Report Mask(ISA_FMA4) Var(ix86_isa_flags) VarExists Save
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Support FMA4 built-in functions and code generation
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mxop
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Target Report Mask(ISA_XOP) Var(ix86_isa_flags) VarExists Save
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Support XOP built-in functions and code generation
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mlwp
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Target Report Mask(ISA_LWP) Var(ix86_isa_flags) VarExists Save
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Support LWP built-in functions and code generation
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mabm
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Target Report Mask(ISA_ABM) Var(ix86_isa_flags) VarExists Save
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Support code generation of Advanced Bit Manipulation (ABM) instructions.
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mpopcnt
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Target Report Mask(ISA_POPCNT) Var(ix86_isa_flags) VarExists Save
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Support code generation of popcnt instruction.
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mcx16
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Target Report Mask(ISA_CX16) Var(ix86_isa_flags) VarExists Save
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| 341 |
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Support code generation of cmpxchg16b instruction.
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msahf
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| 344 |
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Target Report Mask(ISA_SAHF) Var(ix86_isa_flags) VarExists Save
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| 345 |
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Support code generation of sahf instruction in 64bit x86-64 code.
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| 346 |
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mmovbe
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| 348 |
|
|
Target Report Mask(ISA_MOVBE) Var(ix86_isa_flags) VarExists Save
|
| 349 |
|
|
Support code generation of movbe instruction.
|
| 350 |
|
|
|
| 351 |
|
|
mcrc32
|
| 352 |
|
|
Target Report Mask(ISA_CRC32) Var(ix86_isa_flags) VarExists Save
|
| 353 |
|
|
Support code generation of crc32 instruction.
|
| 354 |
|
|
|
| 355 |
|
|
maes
|
| 356 |
|
|
Target Report Mask(ISA_AES) Var(ix86_isa_flags) VarExists Save
|
| 357 |
|
|
Support AES built-in functions and code generation
|
| 358 |
|
|
|
| 359 |
|
|
mpclmul
|
| 360 |
|
|
Target Report Mask(ISA_PCLMUL) Var(ix86_isa_flags) VarExists Save
|
| 361 |
|
|
Support PCLMUL built-in functions and code generation
|
| 362 |
|
|
|
| 363 |
|
|
msse2avx
|
| 364 |
|
|
Target Report Var(ix86_sse2avx)
|
| 365 |
|
|
Encode SSE instructions with VEX prefix
|
