Subversion Repositories openrisc_2011-10-31

/* Subroutines for the C front end on the POWER and PowerPC architectures.

   Copyright (C) 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010

   Free Software Foundation, Inc.

   Contributed by Zack Weinberg <zack@codesourcery.com>

   and Paolo Bonzini <bonzini@gnu.org>

   This file is part of GCC.

   GCC is free software; you can redistribute it and/or modify it

   under the terms of the GNU General Public License as published

   by the Free Software Foundation; either version 3, or (at your

   option) any later version.

   GCC is distributed in the hope that it will be useful, but WITHOUT

   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY

   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public

   License for more details.

   You should have received a copy of the GNU General Public License

   along with GCC; see the file COPYING3.  If not see

   <http://www.gnu.org/licenses/>.  */

#include "config.h"

#include "system.h"

#include "coretypes.h"

#include "tm.h"

#include "cpplib.h"

#include "tree.h"

#include "c-common.h"

#include "c-pragma.h"

#include "c-tree.h"

#include "toplev.h"

#include "tm_p.h"

#include "target.h"

#include "langhooks.h"

/* Handle the machine specific pragma longcall.  Its syntax is

   # pragma longcall ( TOGGLE )

   where TOGGLE is either 0 or 1.

   rs6000_default_long_calls is set to the value of TOGGLE, changing

   whether or not new function declarations receive a longcall

   attribute by default.  */

#define SYNTAX_ERROR(gmsgid) do {                                       \

  warning (OPT_Wpragmas, gmsgid);                                       \

  warning (OPT_Wpragmas, "ignoring malformed #pragma longcall");        \

  return;                                                               \

} while (0)

void

rs6000_pragma_longcall (cpp_reader *pfile ATTRIBUTE_UNUSED)

{

  tree x, n;

  /* If we get here, generic code has already scanned the directive

     leader and the word "longcall".  */

  if (pragma_lex (&x) != CPP_OPEN_PAREN)

    SYNTAX_ERROR ("missing open paren");

  if (pragma_lex (&n) != CPP_NUMBER)

    SYNTAX_ERROR ("missing number");

  if (pragma_lex (&x) != CPP_CLOSE_PAREN)

    SYNTAX_ERROR ("missing close paren");

  if (n != integer_zero_node && n != integer_one_node)

    SYNTAX_ERROR ("number must be 0 or 1");

  if (pragma_lex (&x) != CPP_EOF)

    warning (OPT_Wpragmas, "junk at end of #pragma longcall");

  rs6000_default_long_calls = (n == integer_one_node);

}

/* Handle defining many CPP flags based on TARGET_xxx.  As a general

   policy, rather than trying to guess what flags a user might want a

   #define for, it's better to define a flag for everything.  */

#define builtin_define(TXT) cpp_define (pfile, TXT)

#define builtin_assert(TXT) cpp_assert (pfile, TXT)

/* Keep the AltiVec keywords handy for fast comparisons.  */

static GTY(()) tree __vector_keyword;

static GTY(()) tree vector_keyword;

static GTY(()) tree __pixel_keyword;

static GTY(()) tree pixel_keyword;

static GTY(()) tree __bool_keyword;

static GTY(()) tree bool_keyword;

static GTY(()) tree _Bool_keyword;

/* Preserved across calls.  */

static tree expand_bool_pixel;

static cpp_hashnode *

altivec_categorize_keyword (const cpp_token *tok)

{

  if (tok->type == CPP_NAME)

    {

      cpp_hashnode *ident = tok->val.node.node;

      if (ident == C_CPP_HASHNODE (vector_keyword))

        return C_CPP_HASHNODE (__vector_keyword);

      if (ident == C_CPP_HASHNODE (pixel_keyword))

        return C_CPP_HASHNODE (__pixel_keyword);

      if (ident == C_CPP_HASHNODE (bool_keyword))

        return C_CPP_HASHNODE (__bool_keyword);

      if (ident == C_CPP_HASHNODE (_Bool_keyword))

        return C_CPP_HASHNODE (__bool_keyword);

      return ident;

    }

  return 0;

}

static void

init_vector_keywords (void)

{

  /* Keywords without two leading underscores are context-sensitive,

     and hence implemented as conditional macros, controlled by the

     rs6000_macro_to_expand() function below.  */

  __vector_keyword = get_identifier ("__vector");

  C_CPP_HASHNODE (__vector_keyword)->flags |= NODE_CONDITIONAL;

  __pixel_keyword = get_identifier ("__pixel");

  C_CPP_HASHNODE (__pixel_keyword)->flags |= NODE_CONDITIONAL;

  __bool_keyword = get_identifier ("__bool");

  C_CPP_HASHNODE (__bool_keyword)->flags |= NODE_CONDITIONAL;

  vector_keyword = get_identifier ("vector");

  C_CPP_HASHNODE (vector_keyword)->flags |= NODE_CONDITIONAL;

  pixel_keyword = get_identifier ("pixel");

  C_CPP_HASHNODE (pixel_keyword)->flags |= NODE_CONDITIONAL;

  bool_keyword = get_identifier ("bool");

  C_CPP_HASHNODE (bool_keyword)->flags |= NODE_CONDITIONAL;

  _Bool_keyword = get_identifier ("_Bool");

  C_CPP_HASHNODE (_Bool_keyword)->flags |= NODE_CONDITIONAL;

}

/* Called to decide whether a conditional macro should be expanded.

   Since we have exactly one such macro (i.e, 'vector'), we do not

   need to examine the 'tok' parameter.  */

static cpp_hashnode *

rs6000_macro_to_expand (cpp_reader *pfile, const cpp_token *tok)

{

  cpp_hashnode *expand_this = tok->val.node.node;

  cpp_hashnode *ident;

  ident = altivec_categorize_keyword (tok);

  if (ident != expand_this)

    expand_this = NULL;

  if (ident == C_CPP_HASHNODE (__vector_keyword))

    {

      int idx = 0;

      do

        tok = cpp_peek_token (pfile, idx++);

      while (tok->type == CPP_PADDING);

      ident = altivec_categorize_keyword (tok);

      if (ident == C_CPP_HASHNODE (__pixel_keyword))

        {

          expand_this = C_CPP_HASHNODE (__vector_keyword);

          expand_bool_pixel = __pixel_keyword;

        }

      else if (ident == C_CPP_HASHNODE (__bool_keyword))

        {

          expand_this = C_CPP_HASHNODE (__vector_keyword);

          expand_bool_pixel = __bool_keyword;

        }

      else if (ident)

        {

          enum rid rid_code = (enum rid)(ident->rid_code);

          if (ident->type == NT_MACRO)

            {

              do

                (void) cpp_get_token (pfile);

              while (--idx > 0);

              do

                tok = cpp_peek_token (pfile, idx++);

              while (tok->type == CPP_PADDING);

              ident = altivec_categorize_keyword (tok);

              if (ident == C_CPP_HASHNODE (__pixel_keyword))

                {

                  expand_this = C_CPP_HASHNODE (__vector_keyword);

                  expand_bool_pixel = __pixel_keyword;

                  rid_code = RID_MAX;

                }

              else if (ident == C_CPP_HASHNODE (__bool_keyword))

                {

                  expand_this = C_CPP_HASHNODE (__vector_keyword);

                  expand_bool_pixel = __bool_keyword;

                  rid_code = RID_MAX;

                }

              else if (ident)

                rid_code = (enum rid)(ident->rid_code);

            }

          if (rid_code == RID_UNSIGNED || rid_code == RID_LONG

              || rid_code == RID_SHORT || rid_code == RID_SIGNED

              || rid_code == RID_INT || rid_code == RID_CHAR

              || rid_code == RID_FLOAT

              || (rid_code == RID_DOUBLE && TARGET_VSX))

            {

              expand_this = C_CPP_HASHNODE (__vector_keyword);

              /* If the next keyword is bool or pixel, it

                 will need to be expanded as well.  */

              do

                tok = cpp_peek_token (pfile, idx++);

              while (tok->type == CPP_PADDING);

              ident = altivec_categorize_keyword (tok);

              if (ident == C_CPP_HASHNODE (__pixel_keyword))

                expand_bool_pixel = __pixel_keyword;

              else if (ident == C_CPP_HASHNODE (__bool_keyword))

                expand_bool_pixel = __bool_keyword;

              else

                {

                  /* Try two tokens down, too.  */

                  do

                    tok = cpp_peek_token (pfile, idx++);

                  while (tok->type == CPP_PADDING);

                  ident = altivec_categorize_keyword (tok);

                  if (ident == C_CPP_HASHNODE (__pixel_keyword))

                    expand_bool_pixel = __pixel_keyword;

                  else if (ident == C_CPP_HASHNODE (__bool_keyword))

                    expand_bool_pixel = __bool_keyword;

                }

            }

        }

    }

  else if (expand_bool_pixel && ident == C_CPP_HASHNODE (__pixel_keyword))

    {

      expand_this = C_CPP_HASHNODE (__pixel_keyword);

      expand_bool_pixel = 0;

    }

  else if (expand_bool_pixel && ident == C_CPP_HASHNODE (__bool_keyword))

    {

      expand_this = C_CPP_HASHNODE (__bool_keyword);

      expand_bool_pixel = 0;

    }

  return expand_this;

}

void

rs6000_cpu_cpp_builtins (cpp_reader *pfile)

{

  if (TARGET_POWER2)

    builtin_define ("_ARCH_PWR2");

  else if (TARGET_POWER)

    builtin_define ("_ARCH_PWR");

  if (TARGET_POWERPC)

    builtin_define ("_ARCH_PPC");

  if (TARGET_PPC_GPOPT)

    builtin_define ("_ARCH_PPCSQ");

  if (TARGET_PPC_GFXOPT)

    builtin_define ("_ARCH_PPCGR");

  if (TARGET_POWERPC64)

    builtin_define ("_ARCH_PPC64");

  if (TARGET_MFCRF)

    builtin_define ("_ARCH_PWR4");

  if (TARGET_POPCNTB)

    builtin_define ("_ARCH_PWR5");

  if (TARGET_FPRND)

    builtin_define ("_ARCH_PWR5X");

  if (TARGET_CMPB)

    builtin_define ("_ARCH_PWR6");

  if (TARGET_MFPGPR)

    builtin_define ("_ARCH_PWR6X");

  if (! TARGET_POWER && ! TARGET_POWER2 && ! TARGET_POWERPC)

    builtin_define ("_ARCH_COM");

  if (TARGET_POPCNTD)

    builtin_define ("_ARCH_PWR7");

  if (TARGET_ALTIVEC)

    {

      builtin_define ("__ALTIVEC__");

      builtin_define ("__VEC__=10206");

      /* Define the AltiVec syntactic elements.  */

      builtin_define ("__vector=__attribute__((altivec(vector__)))");

      builtin_define ("__pixel=__attribute__((altivec(pixel__))) unsigned short");

      builtin_define ("__bool=__attribute__((altivec(bool__))) unsigned");

      if (!flag_iso)

        {

          /* Define this when supporting context-sensitive keywords.  */

          builtin_define ("__APPLE_ALTIVEC__");

          builtin_define ("vector=vector");

          builtin_define ("pixel=pixel");

          builtin_define ("bool=bool");

          builtin_define ("_Bool=_Bool");

          init_vector_keywords ();

          /* Enable context-sensitive macros.  */

          cpp_get_callbacks (pfile)->macro_to_expand = rs6000_macro_to_expand;

        }

    }

  if (rs6000_cpu == PROCESSOR_CELL)

    builtin_define ("__PPU__");

  if (TARGET_SPE)

    builtin_define ("__SPE__");

  if (TARGET_PAIRED_FLOAT)

    builtin_define ("__PAIRED__");

  if (TARGET_SOFT_FLOAT)

    builtin_define ("_SOFT_FLOAT");

  if ((!(TARGET_HARD_FLOAT && (TARGET_FPRS || TARGET_E500_DOUBLE)))

      ||(TARGET_HARD_FLOAT && TARGET_FPRS && !TARGET_DOUBLE_FLOAT))

    builtin_define ("_SOFT_DOUBLE");

  /* Used by lwarx/stwcx. errata work-around.  */

  if (rs6000_cpu == PROCESSOR_PPC405)

    builtin_define ("__PPC405__");

  /* Used by libstdc++.  */

  if (TARGET_NO_LWSYNC)

    builtin_define ("__NO_LWSYNC__");

  if (TARGET_VSX)

    {

      builtin_define ("__VSX__");

      /* For the VSX builtin functions identical to Altivec functions, just map

         the altivec builtin into the vsx version (the altivec functions

         generate VSX code if -mvsx).  */

      builtin_define ("__builtin_vsx_xxland=__builtin_vec_and");

      builtin_define ("__builtin_vsx_xxlandc=__builtin_vec_andc");

      builtin_define ("__builtin_vsx_xxlnor=__builtin_vec_nor");

      builtin_define ("__builtin_vsx_xxlor=__builtin_vec_or");

      builtin_define ("__builtin_vsx_xxlxor=__builtin_vec_xor");

      builtin_define ("__builtin_vsx_xxsel=__builtin_vec_sel");

      builtin_define ("__builtin_vsx_vperm=__builtin_vec_perm");

      /* Also map the a and m versions of the multiply/add instructions to the

         builtin for people blindly going off the instruction manual.  */

      builtin_define ("__builtin_vsx_xvmaddadp=__builtin_vsx_xvmadddp");

      builtin_define ("__builtin_vsx_xvmaddmdp=__builtin_vsx_xvmadddp");

      builtin_define ("__builtin_vsx_xvmaddasp=__builtin_vsx_xvmaddsp");

      builtin_define ("__builtin_vsx_xvmaddmsp=__builtin_vsx_xvmaddsp");

      builtin_define ("__builtin_vsx_xvmsubadp=__builtin_vsx_xvmsubdp");

      builtin_define ("__builtin_vsx_xvmsubmdp=__builtin_vsx_xvmsubdp");

      builtin_define ("__builtin_vsx_xvmsubasp=__builtin_vsx_xvmsubsp");

      builtin_define ("__builtin_vsx_xvmsubmsp=__builtin_vsx_xvmsubsp");

      builtin_define ("__builtin_vsx_xvnmaddadp=__builtin_vsx_xvnmadddp");

      builtin_define ("__builtin_vsx_xvnmaddmdp=__builtin_vsx_xvnmadddp");

      builtin_define ("__builtin_vsx_xvnmaddasp=__builtin_vsx_xvnmaddsp");

      builtin_define ("__builtin_vsx_xvnmaddmsp=__builtin_vsx_xvnmaddsp");

      builtin_define ("__builtin_vsx_xvnmsubadp=__builtin_vsx_xvnmsubdp");

      builtin_define ("__builtin_vsx_xvnmsubmdp=__builtin_vsx_xvnmsubdp");

      builtin_define ("__builtin_vsx_xvnmsubasp=__builtin_vsx_xvnmsubsp");

      builtin_define ("__builtin_vsx_xvnmsubmsp=__builtin_vsx_xvnmsubsp");

    }

  /* Tell users they can use __builtin_bswap{16,64}.  */

  builtin_define ("__HAVE_BSWAP__");

  /* May be overridden by target configuration.  */

  RS6000_CPU_CPP_ENDIAN_BUILTINS();

  if (TARGET_LONG_DOUBLE_128)

    {

      builtin_define ("__LONG_DOUBLE_128__");

      builtin_define ("__LONGDOUBLE128");

    }

  switch (rs6000_current_abi)

    {

    case ABI_V4:

      builtin_define ("_CALL_SYSV");

      break;

    case ABI_AIX:

      builtin_define ("_CALL_AIXDESC");

      builtin_define ("_CALL_AIX");

      break;

    case ABI_DARWIN:

      builtin_define ("_CALL_DARWIN");

      break;

    default:

      break;

    }

  /* Let the compiled code know if 'f' class registers will not be available.  */

  if (TARGET_SOFT_FLOAT || !TARGET_FPRS)

    builtin_define ("__NO_FPRS__");

  /* Generate defines for Xilinx FPU. */

  if (rs6000_xilinx_fpu)

    {

      builtin_define ("_XFPU");

      if (rs6000_single_float && ! rs6000_double_float)

        {

          if (rs6000_simple_fpu)

            builtin_define ("_XFPU_SP_LITE");

          else

            builtin_define ("_XFPU_SP_FULL");

        }

      if (rs6000_double_float)

        {

          if (rs6000_simple_fpu)

            builtin_define ("_XFPU_DP_LITE");

          else

            builtin_define ("_XFPU_DP_FULL");

        }

    }

}

struct altivec_builtin_types

{

  enum rs6000_builtins code;

  enum rs6000_builtins overloaded_code;

  signed char ret_type;

  signed char op1;

  signed char op2;

  signed char op3;

};

const struct altivec_builtin_types altivec_overloaded_builtins[] = {

  /* Unary AltiVec/VSX builtins.  */

  { ALTIVEC_BUILTIN_VEC_ABS, ALTIVEC_BUILTIN_ABS_V16QI,

    RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 },

  { ALTIVEC_BUILTIN_VEC_ABS, ALTIVEC_BUILTIN_ABS_V8HI,

    RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 },

  { ALTIVEC_BUILTIN_VEC_ABS, ALTIVEC_BUILTIN_ABS_V4SI,

    RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 },

  { ALTIVEC_BUILTIN_VEC_ABS, ALTIVEC_BUILTIN_ABS_V4SF,

    RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 },

  { ALTIVEC_BUILTIN_VEC_ABS, VSX_BUILTIN_XVABSDP,

    RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 },

  { ALTIVEC_BUILTIN_VEC_ABSS, ALTIVEC_BUILTIN_ABSS_V16QI,

    RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 },

  { ALTIVEC_BUILTIN_VEC_ABSS, ALTIVEC_BUILTIN_ABSS_V8HI,

    RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 },

  { ALTIVEC_BUILTIN_VEC_ABSS, ALTIVEC_BUILTIN_ABSS_V4SI,

    RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 },

  { ALTIVEC_BUILTIN_VEC_CEIL, ALTIVEC_BUILTIN_VRFIP,

    RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 },

  { ALTIVEC_BUILTIN_VEC_CEIL, VSX_BUILTIN_XVRDPIP,

    RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 },

  { ALTIVEC_BUILTIN_VEC_EXPTE, ALTIVEC_BUILTIN_VEXPTEFP,

    RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 },

  { ALTIVEC_BUILTIN_VEC_FLOOR, VSX_BUILTIN_XVRDPIM,

    RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 },

  { ALTIVEC_BUILTIN_VEC_FLOOR, ALTIVEC_BUILTIN_VRFIM,

    RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 },

  { ALTIVEC_BUILTIN_VEC_LOGE, ALTIVEC_BUILTIN_VLOGEFP,

    RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 },

  { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR,

    RS6000_BTI_void, RS6000_BTI_V4SI, 0, 0 },

  { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR,

    RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, 0, 0 },

  { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR,

    RS6000_BTI_void, RS6000_BTI_bool_V4SI, 0, 0 },

  { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR,

    RS6000_BTI_void, RS6000_BTI_V8HI, 0, 0 },

  { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR,

    RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, 0, 0 },

  { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR,

    RS6000_BTI_void, RS6000_BTI_bool_V8HI, 0, 0 },

  { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR,

    RS6000_BTI_void, RS6000_BTI_pixel_V8HI, 0, 0 },

  { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR,

    RS6000_BTI_void, RS6000_BTI_V16QI, 0, 0 },

  { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR,

    RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, 0, 0 },

  { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR,

    RS6000_BTI_void, RS6000_BTI_bool_V16QI, 0, 0 },

  { ALTIVEC_BUILTIN_VEC_RE, ALTIVEC_BUILTIN_VREFP,

    RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 },

  { ALTIVEC_BUILTIN_VEC_ROUND, ALTIVEC_BUILTIN_VRFIN,

    RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 },

  { ALTIVEC_BUILTIN_VEC_RSQRTE, ALTIVEC_BUILTIN_VRSQRTEFP,

    RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 },

  { ALTIVEC_BUILTIN_VEC_TRUNC, ALTIVEC_BUILTIN_VRFIZ,

    RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 },

  { ALTIVEC_BUILTIN_VEC_TRUNC, VSX_BUILTIN_XVRDPIZ,

    RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 },

  { ALTIVEC_BUILTIN_VEC_UNPACKH, ALTIVEC_BUILTIN_VUPKHSB,

    RS6000_BTI_V8HI, RS6000_BTI_V16QI, 0, 0 },

  { ALTIVEC_BUILTIN_VEC_UNPACKH, ALTIVEC_BUILTIN_VUPKHSB,

    RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V16QI, 0, 0 },

  { ALTIVEC_BUILTIN_VEC_UNPACKH, ALTIVEC_BUILTIN_VUPKHSH,

    RS6000_BTI_V4SI, RS6000_BTI_V8HI, 0, 0 },

  { ALTIVEC_BUILTIN_VEC_UNPACKH, ALTIVEC_BUILTIN_VUPKHSH,

    RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V8HI, 0, 0 },

  { ALTIVEC_BUILTIN_VEC_UNPACKH, ALTIVEC_BUILTIN_VUPKHPX,

    RS6000_BTI_unsigned_V4SI, RS6000_BTI_pixel_V8HI, 0, 0 },

  { ALTIVEC_BUILTIN_VEC_VUPKHSH, ALTIVEC_BUILTIN_VUPKHSH,

    RS6000_BTI_V4SI, RS6000_BTI_V8HI, 0, 0 },

  { ALTIVEC_BUILTIN_VEC_VUPKHSH, ALTIVEC_BUILTIN_VUPKHSH,

    RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V8HI, 0, 0 },

  { ALTIVEC_BUILTIN_VEC_VUPKHPX, ALTIVEC_BUILTIN_VUPKHPX,

    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, 0, 0 },

  { ALTIVEC_BUILTIN_VEC_VUPKHPX, ALTIVEC_BUILTIN_VUPKHPX,

    RS6000_BTI_unsigned_V4SI, RS6000_BTI_pixel_V8HI, 0, 0 },

  { ALTIVEC_BUILTIN_VEC_VUPKHSB, ALTIVEC_BUILTIN_VUPKHSB,

    RS6000_BTI_V8HI, RS6000_BTI_V16QI, 0, 0 },

  { ALTIVEC_BUILTIN_VEC_VUPKHSB, ALTIVEC_BUILTIN_VUPKHSB,

    RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V16QI, 0, 0 },

  { ALTIVEC_BUILTIN_VEC_UNPACKL, ALTIVEC_BUILTIN_VUPKLSB,

    RS6000_BTI_V8HI, RS6000_BTI_V16QI, 0, 0 },

  { ALTIVEC_BUILTIN_VEC_UNPACKL, ALTIVEC_BUILTIN_VUPKLSB,

    RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V16QI, 0, 0 },

  { ALTIVEC_BUILTIN_VEC_UNPACKL, ALTIVEC_BUILTIN_VUPKLPX,

    RS6000_BTI_unsigned_V4SI, RS6000_BTI_pixel_V8HI, 0, 0 },

  { ALTIVEC_BUILTIN_VEC_UNPACKL, ALTIVEC_BUILTIN_VUPKLSH,

    RS6000_BTI_V4SI, RS6000_BTI_V8HI, 0, 0 },

  { ALTIVEC_BUILTIN_VEC_UNPACKL, ALTIVEC_BUILTIN_VUPKLSH,

    RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V8HI, 0, 0 },

  { ALTIVEC_BUILTIN_VEC_VUPKLPX, ALTIVEC_BUILTIN_VUPKLPX,

    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, 0, 0 },

  { ALTIVEC_BUILTIN_VEC_VUPKLPX, ALTIVEC_BUILTIN_VUPKLPX,

    RS6000_BTI_unsigned_V4SI, RS6000_BTI_pixel_V8HI, 0, 0 },

  { ALTIVEC_BUILTIN_VEC_VUPKLSH, ALTIVEC_BUILTIN_VUPKLSH,

    RS6000_BTI_V4SI, RS6000_BTI_V8HI, 0, 0 },

  { ALTIVEC_BUILTIN_VEC_VUPKLSH, ALTIVEC_BUILTIN_VUPKLSH,

    RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V8HI, 0, 0 },

  { ALTIVEC_BUILTIN_VEC_VUPKLSB, ALTIVEC_BUILTIN_VUPKLSB,

    RS6000_BTI_V8HI, RS6000_BTI_V16QI, 0, 0 },

  { ALTIVEC_BUILTIN_VEC_VUPKLSB, ALTIVEC_BUILTIN_VUPKLSB,

    RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V16QI, 0, 0 },

  /* Binary AltiVec/VSX builtins.  */

  { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUBM,

    RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },

  { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUBM,

    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 },

  { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUBM,

    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },

  { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUBM,

    RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 },

  { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUBM,

    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 },

  { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUBM,

    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },

  { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUHM,

    RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },

  { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUHM,

    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 },

  { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUHM,

    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },

  { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUHM,

    RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 },

  { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUHM,

    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 },

  { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUHM,

    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },

  { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUWM,

    RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },

  { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUWM,

    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 },

  { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUWM,

    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },

  { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUWM,

    RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 },

  { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUWM,

    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 },

  { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUWM,

    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },

  { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDFP,

    RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },

  { ALTIVEC_BUILTIN_VEC_ADD, VSX_BUILTIN_XVADDDP,

    RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },

  { ALTIVEC_BUILTIN_VEC_VADDFP, ALTIVEC_BUILTIN_VADDFP,

    RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },

  { ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM,

    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },

  { ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM,

    RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 },

  { ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM,

    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, 0 },

  { ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM,

    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },

  { ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM,

    RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },

  { ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM,

    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 },

  { ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM,

    RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 },

  { ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM,

    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 },

  { ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM,

    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },

  { ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM,

    RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 },

  { ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM,

    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, 0 },

  { ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM,

    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },

  { ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM,

    RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },

  { ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM,

    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 },

  { ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM,

    RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 },

  { ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM,

    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 },

  { ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM,

    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },

  { ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM,

    RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 },

  { ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM,

    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 },

  { ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM,

    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },

  { ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM,

    RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },

  { ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM,

    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 },

  { ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM,

    RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 },

  { ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM,

    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 },

  { ALTIVEC_BUILTIN_VEC_ADDC, ALTIVEC_BUILTIN_VADDCUW,

    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },

  { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUBS,

    RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 },

  { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUBS,

    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 },

  { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUBS,

    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },

  { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSBS,

    RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },

  { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSBS,

    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 },

  { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSBS,

    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },

  { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUHS,

    RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 },