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[/] [openrisc/] [tags/] [gnu-src/] [gcc-4.5.1/] [gcc-4.5.1-or32-1.0rc1/] [gcc/] [config/] [sh/] [constraints.md] - Blame information for rev 282

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1 282 jeremybenn
;; Constraint definitions for Renesas / SuperH SH.
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;; Copyright (C) 2007, 2008 Free Software Foundation, Inc.
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;;
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;; This file is part of GCC.
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;;
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;; GCC is free software; you can redistribute it and/or modify
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;; it under the terms of the GNU General Public License as published by
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;; the Free Software Foundation; either version 3, or (at your option)
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;; any later version.
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;;
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;; GCC is distributed in the hope that it will be useful,
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;; but WITHOUT ANY WARRANTY; without even the implied warranty of
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;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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;; GNU General Public License for more details.
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;;
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;; You should have received a copy of the GNU General Public License
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;; along with GCC; see the file COPYING3.  If not see
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;; .
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;; Overview of uppercase letter constraints:
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;; Bxx: miscellaneous constraints
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;;  Bsc: SCRATCH - for the scratch register in movsi_ie in the
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;;       fldi0 / fldi0 cases
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;; Cxx: Constants other than only CONST_INT
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;;  Css: signed 16-bit constant, literal or symbolic
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;;  Csu: unsigned 16-bit constant, literal or symbolic
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;;  Csy: label or symbol
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;;  Cpg: non-explicit constants that can be directly loaded into a general
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;;       purpose register in PIC code.  like 's' except we don't allow
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;;       PIC_ADDR_P
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;; IJKLMNOP: CONT_INT constants
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;;  Ixx: signed xx bit
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;;  J16: 0xffffffff00000000 | 0x00000000ffffffff
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;;  Kxx: unsigned xx bit
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;;  M: 1
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;;  N: 0
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;;  P27: 1 | 2 | 8 | 16
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;;  Pso: 1 | 2 | 4 | 8 | 16 | 32 | 64 | 128
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;;  Psz: ~1 | ~2 | ~4 | ~8 | ~16 | ~32 | ~64 | ~128
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;; Q: pc relative load operand
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;; Rxx: reserved for exotic register classes.
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;; Sxx: extra memory (storage) constraints
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;;  Sua: unaligned memory operations
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;; W: vector
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;; Z: zero in any mode
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;;
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;; unused CONST_INT constraint letters: LO
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;; unused EXTRA_CONSTRAINT letters: D T U Y
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;; Register constraints
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(define_register_constraint "a" "ALL_REGS"
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  "@internal")
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(define_register_constraint "b" "TARGET_REGS"
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  "Branch target registers.")
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(define_register_constraint "c" "FPSCR_REGS"
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  "Floating-point status register.")
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(define_register_constraint "d" "DF_REGS"
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  "Double precision floating-point register.")
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(define_register_constraint "e" "TARGET_FMOVD ? NO_REGS : FP_REGS"
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  "Floating-point register.")
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(define_register_constraint "f" "FP_REGS"
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  "Floating-point register.")
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(define_register_constraint "k" "SIBCALL_REGS"
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  "@internal")
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(define_register_constraint "l" "PR_REGS"
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  "PR register.")
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(define_register_constraint "t" "T_REGS"
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  "T register.")
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(define_register_constraint "w" "FP0_REGS"
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  "Floating-point register 0.")
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(define_register_constraint "x" "MAC_REGS"
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  "MACH and MACL registers.")
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(define_register_constraint "y" "FPUL_REGS"
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  "FPUL register.")
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(define_register_constraint "z" "R0_REGS"
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  "R0 register.")
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;; Integer constraints
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(define_constraint "I06"
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  "A signed 6-bit constant, as used in SHmedia beqi, bnei and xori."
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  (and (match_code "const_int")
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       (match_test "ival >= -32 && ival <= 31")))
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(define_constraint "I08"
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  "A signed 8-bit constant, as used in add, sub, etc."
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  (and (match_code "const_int")
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       (match_test "ival >= -128 && ival <= 127")))
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(define_constraint "I10"
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  "A signed 10-bit constant, as used in in SHmedia andi, ori."
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  (and (match_code "const_int")
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       (match_test "ival >= -512 && ival <= 511")))
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(define_constraint "I16"
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  "A signed 16-bit constant, as used in SHmedia movi."
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  (and (match_code "const_int")
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       (match_test "ival >= -32768 && ival <= 32767")))
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(define_constraint "I20"
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  "A signed 20-bit constant, as used in SH2A movi20."
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  (and (match_code "const_int")
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       (match_test "ival >= -524288 && ival <= 524287")
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       (match_test "TARGET_SH2A")))
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(define_constraint "I28"
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  "A signed 28-bit constant, as used in SH2A movi20s."
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  (and (match_code "const_int")
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       (match_test "ival >=  -134217728 && ival <= 134217727")
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       (match_test "(ival & 255) == 0")
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       (match_test "TARGET_SH2A")))
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(define_constraint "J16"
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  "0xffffffff00000000 or 0x00000000ffffffff."
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  (and (match_code "const_int")
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       (match_test "CONST_OK_FOR_J16 (ival)")))
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(define_constraint "K03"
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  "An unsigned 3-bit constant, as used in SH2A bclr, bset, etc."
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  (and (match_code "const_int")
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       (match_test "ival >= 0 && ival <= 7")))
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(define_constraint "K08"
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  "An unsigned 8-bit constant, as used in and, or, etc."
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  (and (match_code "const_int")
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       (match_test "ival >= 0 && ival <= 255")))
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(define_constraint "K12"
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  "An unsigned 8-bit constant, as used in SH2A 12-bit display."
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  (and (match_code "const_int")
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       (match_test "ival >= 0 && ival <= 4095")))
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(define_constraint "K16"
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  "An unsigned 16-bit constant, as used in SHmedia shori."
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  (and (match_code "const_int")
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       (match_test "ival >= 0 && ival <= 65535")))
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(define_constraint "P27"
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  "A constant for shift operand 1,2,8 or 16."
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  (and (match_code "const_int")
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       (match_test "ival == 1 || ival == 2 || ival == 8 || ival == 16")))
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(define_constraint "M"
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  "Integer constant 1."
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  (and (match_code "const_int")
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       (match_test "ival == 1")))
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(define_constraint "N"
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  "Integer constant 0."
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  (and (match_code "const_int")
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       (match_test "ival == 0")))
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;; Floating-point constraints
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(define_constraint "G"
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  "Double constant 0."
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  (and (match_code "const_double")
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       (match_test "fp_zero_operand (op) && fldi_ok ()")))
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(define_constraint "H"
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  "Double constant 1."
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  (and (match_code "const_double")
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       (match_test "fp_one_operand (op) && fldi_ok ()")))
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;; Extra constraints
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(define_constraint "Q"
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  "A pc relative load operand."
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  (and (match_code "mem")
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       (match_test "IS_PC_RELATIVE_LOAD_ADDR_P (XEXP (op, 0))")))
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(define_constraint "Bsc"
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  "Constraint for selecting FLDI0 or FLDI1 instruction.  If the clobber
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   operand is not SCRATCH (i.e. REG) then R0 is probably being used,
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   hence mova is being used, hence do not select this pattern."
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  (match_code "scratch"))
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(define_constraint "Css"
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  "A signed 16-bit constant, literal or symbolic."
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  (and (match_code "const")
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       (match_test "GET_CODE (XEXP (op, 0)) == UNSPEC")
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       (match_test "XINT (XEXP (op, 0), 1) == UNSPEC_EXTRACT_S16")))
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(define_constraint "Csu"
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  "An unsigned 16-bit constant, literal or symbolic."
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  (and (match_code "const")
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       (match_test "GET_CODE (XEXP (op, 0)) == UNSPEC")
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       (match_test "XINT (XEXP (op, 0), 1) == UNSPEC_EXTRACT_U16")))
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(define_constraint "Csy"
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  "A label or a symbol."
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  (ior (match_test "NON_PIC_REFERENCE_P (op)")
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       (match_test "PIC_ADDR_P (op)")))
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(define_constraint "Z"
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  "A zero in any shape or form."
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  (match_test "op == CONST0_RTX (GET_MODE (op))"))
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(define_constraint "W"
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  "Any vector constant we can handle."
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  (and (match_code "const_vector")
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       (ior (match_test "sh_rep_vec (op, VOIDmode)")
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            (match_test "HOST_BITS_PER_WIDE_INT >= 64
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                         ? sh_const_vec (op, VOIDmode)
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                         : sh_1el_vec (op, VOIDmode)"))))
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(define_constraint "Cpg"
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  "A non-explicit constant that can be loaded directly into a general
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   purpose register.  This is like 's' except we don't allow
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   PIC_ADDR_P."
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  (match_test "IS_NON_EXPLICIT_CONSTANT_P (op)"))
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(define_constraint "Pso"
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  "Integer constant with a single bit set in its lower 8-bit."
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  (and (match_code "const_int")
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       (ior (match_test "ival == 1")
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            (match_test "ival == 2")
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            (match_test "ival == 4")
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            (match_test "ival == 8")
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            (match_test "ival == 16")
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            (match_test "ival == 32")
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            (match_test "ival == 64")
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            (match_test "ival == 128"))))
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(define_constraint "Psz"
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  "Integer constant with a single zero bit in the lower 8-bit."
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  (and (match_code "const_int")
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       (ior (match_test "~ival == 1")
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            (match_test "~ival == 2")
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            (match_test "~ival == 4")
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            (match_test "~ival == 8")
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            (match_test "~ival == 16")
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            (match_test "~ival == 32")
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            (match_test "~ival == 64")
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            (match_test "~ival == 128"))))
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(define_memory_constraint "Sr0"
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  "@internal"
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  (and (match_test "memory_operand (op, GET_MODE (op))")
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       (match_test "!refers_to_regno_p (R0_REG, R0_REG + 1, op, (rtx *) 0)")))
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(define_memory_constraint "Sua"
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  "@internal"
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  (and (match_test "memory_operand (op, GET_MODE (op))")
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       (match_test "GET_CODE (XEXP (op, 0)) != PLUS")))
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(define_memory_constraint "Sbv"
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  "A memory reference, as used in SH2A bclr.b, bset.b, etc."
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  (and (match_test "MEM_P (op) && GET_MODE (op) == QImode")
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       (match_test "REG_P (XEXP (op, 0))")))
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(define_memory_constraint "Sbw"
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  "A memory reference, as used in SH2A bclr.b, bset.b, etc."
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  (and (match_test "MEM_P (op) && GET_MODE (op) == QImode")
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       (match_test "GET_CODE (XEXP (op, 0)) == PLUS")
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       (match_test "REG_P (XEXP (XEXP (op, 0), 0))")
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       (match_test "satisfies_constraint_K12 (XEXP (XEXP (op, 0), 1))")))

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