OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [tags/] [gnu-src/] [gcc-4.5.1/] [gcc-4.5.1-or32-1.0rc1/] [gcc/] [testsuite/] [gcc.c-torture/] [compile/] [20030703-1.c] - Blame information for rev 338

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 297 jeremybenn
/* Extracted from PR target/10700.  */
2
/* The following code used to cause an ICE on 64-bit targets.  */
3
 
4
int SAD_Block(int *);
5
void MBMotionEstimation(int *act_block, int block)
6
{
7
    SAD_Block(act_block + (  (8 * (block == 1 || block == 3))
8
                          + (8 * (block == 2 || block == 3))));
9
}
10
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.