OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [tags/] [gnu-src/] [gcc-4.5.1/] [gcc-4.5.1-or32-1.0rc1/] [gcc/] [testsuite/] [gcc.c-torture/] [execute/] [loop-5.c] - Blame information for rev 338

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 297 jeremybenn 
static int ap(int i);
2 
static void testit(void){
3 
  int ir[4] = {0,1,2,3};
4 
  int ix,n,m;
5 
  n=1; m=3;
6 
  for (ix=1;ix<=4;ix++) {
7 
    if (n == 1) m = 4;
8 
    else        m = n-1;
9 
    ap(ir[n-1]);
10 
    n = m;
11 
  }
12 
}
13 
 
14 
static int t = 0;
15 
static int a[4];
16 
 
17 
static int ap(int i){
18 
  if (t > 3)
19 
    abort();
20 
  a[t++] = i;
21 
  return 1;
22 
}
23 
 
24 
int main(void)
25 
{
26 
  testit();
27 
  if (a[0] != 0)
28 
    abort();
29 
  if (a[1] != 3)
30 
    abort();
31 
  if (a[2] != 2)
32 
    abort();
33 
  if (a[3] != 1)
34 
    abort();
35 
  exit(0);
36 
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.