URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [tags/] [gnu-src/] [gcc-4.5.1/] [gcc-4.5.1-or32-1.0rc1/] [gcc/] [testsuite/] [gcc.dg/] [and-1.c] - Blame information for rev 338

Details | Compare with Previous | View Log


/* { dg-do compile } */
/* { dg-options "-O2" } */
/* { dg-final { scan-assembler "and" { target powerpc*-*-* spu-*-* } } } */
/* There should be no nand for this testcase (for either PPC or SPU). */
/* { dg-final { scan-assembler-not "nand" { target powerpc*-*-* spu-*-* } } } */
 
int f(int y)
{
  return y & ~(y & -y);
}

Line No.	Rev	Author	Line
1	298	jeremybenn	`/* { dg-do compile } */`
2			`/* { dg-options "-O2" } */`
3			`/* { dg-final { scan-assembler "and" { target powerpc--* spu-- } } } */`
4			`/* There should be no nand for this testcase (for either PPC or SPU). */`
5			`/* { dg-final { scan-assembler-not "nand" { target powerpc--* spu-- } } } */`
6
7			`int f(int y)`
8			`{`
9			`return y & ~(y & -y);`
10			`}`

Browse

Tools

Subversion Repositories openrisc

[/] [openrisc/] [tags/] [gnu-src/] [gcc-4.5.1/] [gcc-4.5.1-or32-1.0rc1/] [gcc/] [testsuite/] [gcc.dg/] [and-1.c] - Blame information for rev 338