OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [tags/] [gnu-src/] [gcc-4.5.1/] [gcc-4.5.1-or32-1.0rc1/] [gcc/] [testsuite/] [gcc.dg/] [vect/] [vect-shift-1.c] - Blame information for rev 338

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 298 jeremybenn
/* { dg-require-effective-target vect_shift } */
2
/* { dg-require-effective-target vect_int } */
3
 
4
#include <stdarg.h>
5
#include "tree-vect.h"
6
 
7
#define N 8
8
 
9
unsigned int A[N] = { 0x08000000, 0x08000001, 0x0ff0000ff, 0xf0000001,
10
                      0x08000000, 0x08000001, 0x0ff0000ff, 0xf0000001 };
11
unsigned int B[N] = { 0x01000000, 0x01000000, 0x01fe0001f, 0x1e000000,
12
                      0x01000000, 0x01000000, 0x01fe0001f, 0x1e000000 };
13
 
14
int main ()
15
{
16
  int i;
17
 
18
  check_vect ();
19
 
20
  for (i = 0; i < N; i++)
21
    A[i] = A[i] >> 3;
22
 
23
  /* check results:  */
24
  for (i = 0; i < N; i++)
25
    if (A[i] != B[i])
26
      abort ();
27
 
28
  return 0;
29
}
30
 
31
/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
32
/* { dg-final { cleanup-tree-dump "vect" } } */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.