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[/] [openrisc/] [tags/] [gnu-src/] [gcc-4.5.1/] [gcc-4.5.1-or32-1.0rc1/] [gcc/] [testsuite/] [gcc.target/] [arm/] [neon/] [vclsQs16.c] - Blame information for rev 338

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/* Test the `vclsQs16' ARM Neon intrinsic.  */
/* This file was autogenerated by neon-testgen.  */
 
/* { dg-do assemble } */
/* { dg-require-effective-target arm_neon_ok } */
/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
 
#include "arm_neon.h"
 
void test_vclsQs16 (void)
{
  int16x8_t out_int16x8_t;
  int16x8_t arg0_int16x8_t;
 
  out_int16x8_t = vclsq_s16 (arg0_int16x8_t);
}
 
/* { dg-final { scan-assembler "vcls\.s16\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */

Line No.	Rev	Author	Line
1	313	jeremybenn	/* Test the `vclsQs16' ARM Neon intrinsic. */
2			`/* This file was autogenerated by neon-testgen. */`
3
4			`/* { dg-do assemble } */`
5			`/* { dg-require-effective-target arm_neon_ok } */`
6			`/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */`
7
8			`#include "arm_neon.h"`
9
10			`void test_vclsQs16 (void)`
11			`{`
12			`int16x8_t out_int16x8_t;`
13			`int16x8_t arg0_int16x8_t;`
14
15			`out_int16x8_t = vclsq_s16 (arg0_int16x8_t);`
16			`}`
17
18			`/* { dg-final { scan-assembler "vcls\.s16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */`
19			`/* { dg-final { cleanup-saved-temps } } */`

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[/] [openrisc/] [tags/] [gnu-src/] [gcc-4.5.1/] [gcc-4.5.1-or32-1.0rc1/] [gcc/] [testsuite/] [gcc.target/] [arm/] [neon/] [vclsQs16.c] - Blame information for rev 338