OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [tags/] [gnu-src/] [gcc-4.5.1/] [gcc-4.5.1-or32-1.0rc1/] [gcc/] [testsuite/] [gcc.target/] [i386/] [mul.c] - Blame information for rev 338

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 318 jeremybenn
/* { dg-do compile } */
2
/* This test checks for absolute memory operands.  */
3
/* { dg-require-effective-target nonpic } */
4
/* { dg-options "-O2 -march=k8" } */
5
/* { dg-final { scan-assembler "and\[^\\n\]*magic" } } */
6
 
7
/* Should be done as "andw $32767, magic".  */
8
static unsigned short magic;
9
void t(void)
10
{
11
        magic%=(unsigned short)0x8000U;
12
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.