URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [tags/] [gnu-src/] [gcc-4.5.1/] [gcc-4.5.1-or32-1.0rc1/] [gcc/] [testsuite/] [gcc.target/] [i386/] [pr27696.c] - Blame information for rev 338

Details | Compare with Previous | View Log


/* PR target/27696
   The testcase below uses to trigger an ICE.  */
 
/* { dg-do compile } */
/* { dg-options "-msse3" } */
 
void
foo (void const * P, unsigned int E, unsigned int H)
{
  __builtin_ia32_monitor (P, E, H);
}

Line No.	Rev	Author	Line
1	318	jeremybenn	`/* PR target/27696`
2			`The testcase below uses to trigger an ICE. */`
3
4			`/* { dg-do compile } */`
5			`/* { dg-options "-msse3" } */`
6
7			`void`
8			`foo (void const * P, unsigned int E, unsigned int H)`
9			`{`
10			`__builtin_ia32_monitor (P, E, H);`
11			`}`

Browse

Tools

Subversion Repositories openrisc

[/] [openrisc/] [tags/] [gnu-src/] [gcc-4.5.1/] [gcc-4.5.1-or32-1.0rc1/] [gcc/] [testsuite/] [gcc.target/] [i386/] [pr27696.c] - Blame information for rev 338