OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [tags/] [gnu-src/] [gcc-4.5.1/] [gcc-4.5.1-or32-1.0rc1/] [gcc/] [testsuite/] [gcc.target/] [i386/] [sse-cvtsi2ss-2.c] - Blame information for rev 779

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 318 jeremybenn
/* { dg-do run } */
2
/* { dg-require-effective-target lp64 } */
3
/* { dg-require-effective-target sse } */
4
/* { dg-options "-O2 -msse" } */
5
 
6
#ifndef CHECK_H
7
#define CHECK_H "sse-check.h"
8
#endif
9
 
10
#ifndef TEST
11
#define TEST sse_test
12
#endif
13
 
14
#include CHECK_H
15
 
16
#include <xmmintrin.h>
17
 
18
static __m128
19
__attribute__((noinline, unused))
20
test (__m128 p, long long b)
21
{
22
  return _mm_cvtsi64_ss (p, b);
23
}
24
 
25
static void
26
TEST (void)
27
{
28
  union128 u, s1;
29
  long long b = 4294967295133LL;
30
  float e[4] = { 24.43, 68.346, 43.35, 546.46 };
31
 
32
  s1.x = _mm_set_ps (e[3], e[2], e[1], e[0]);
33
  u.x = test (s1.x, b);
34
  e[0] = (float)b;
35
 
36
  if (check_union128 (u, e))
37
    abort ();
38
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.