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[/] [openrisc/] [tags/] [gnu-src/] [gcc-4.5.1/] [gcc-4.5.1-or32-1.0rc1/] [gcc/] [testsuite/] [gcc.target/] [i386/] [ssetype-4.c] - Blame information for rev 338

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Line No. Rev Author Line
1 318 jeremybenn
/* { dg-do compile } */
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/* { dg-options "-O2 -msse2 -march=k8" } */
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/* { dg-require-effective-target sse2 } */
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/* { dg-final { scan-assembler "andps" } } */
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/* { dg-final { scan-assembler "andnps" } } */
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/* { dg-final { scan-assembler "xorps" } } */
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/* { dg-final { scan-assembler "orps" } } */
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/* Verify that we generate proper instruction without memory operand.  */
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#include <xmmintrin.h>
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__m128
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t1(__m128 a, __m128 b)
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{
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a=_mm_sqrt_ps(a);
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b=_mm_sqrt_ps(b);
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return _mm_and_ps (a,b);
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}
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__m128
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t2(__m128 a, __m128 b)
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{
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a=_mm_sqrt_ps(a);
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b=_mm_sqrt_ps(b);
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return _mm_andnot_ps (a,b);
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}
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__m128
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t3(__m128 a, __m128 b)
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{
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a=_mm_sqrt_ps(a);
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b=_mm_sqrt_ps(b);
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return _mm_or_ps (a,b);
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}
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__m128
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t4(__m128 a, __m128 b)
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{
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a=_mm_sqrt_ps(a);
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b=_mm_sqrt_ps(b);
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return _mm_xor_ps (a,b);
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}

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