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[/] [openrisc/] [tags/] [gnu-src/] [gcc-4.5.1/] [gcc-4.5.1-or32-1.0rc1/] [gcc/] [testsuite/] [gcc.target/] [mips/] [dspr2-MULTU.c] - Blame information for rev 338

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Line No. Rev Author Line
1 321 jeremybenn
/* Test MIPS32 DSP REV 2 MULTU instruction.  Tune for a CPU that has
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   pipelined multu.  */
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/* { dg-do compile } */
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/* { dg-options "-mgp32 -mdspr2 -O2 -ffixed-hi -ffixed-lo -mtune=74kc" } */
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/* { dg-final { scan-assembler "\tmultu\t" } } */
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/* { dg-final { scan-assembler "ac1" } } */
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/* { dg-final { scan-assembler "ac2" } } */
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typedef unsigned long long a64;
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NOMIPS16 a64 test (a64 *a, unsigned int *b, unsigned int *c)
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{
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  a[0] = (a64) b[0] * c[0];
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  a[1] = (a64) b[1] * c[1];
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}

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