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[/] [openrisc/] [tags/] [gnu-src/] [gcc-4.5.1/] [gcc-4.5.1-or32-1.0rc1/] [gcc/] [testsuite/] [gcc.target/] [mips/] [ext-3.c] - Blame information for rev 338

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/* For MIPS64r2 use DEXT rather than DSLL/DSRL to zero-extend.  */
/* { dg-do compile } */
/* { dg-options "-O isa_rev>=2 -mgp64" } */
/* { dg-final { scan-assembler "\tdext\t" } } */
/* { dg-final { scan-assembler-not "sll" } } */
 
NOMIPS16 unsigned long long
f (unsigned *i)
{
  unsigned j = *i;
  j >>= 1;                      /* enforce this is all done in SI mode */
  j++;                          /* don't merge the shift and the extension */
  return j;
}

Line No.	Rev	Author	Line
1	321	jeremybenn	`/* For MIPS64r2 use DEXT rather than DSLL/DSRL to zero-extend. */`
2			`/* { dg-do compile } */`
3			`/* { dg-options "-O isa_rev>=2 -mgp64" } */`
4			`/* { dg-final { scan-assembler "\tdext\t" } } */`
5			`/* { dg-final { scan-assembler-not "sll" } } */`
6
7			`NOMIPS16 unsigned long long`
8			`f (unsigned *i)`
9			`{`
10			`unsigned j = *i;`
11			`j >>= 1; /* enforce this is all done in SI mode */`
12			`j++; /* don't merge the shift and the extension */`
13			`return j;`
14			`}`

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[/] [openrisc/] [tags/] [gnu-src/] [gcc-4.5.1/] [gcc-4.5.1-or32-1.0rc1/] [gcc/] [testsuite/] [gcc.target/] [mips/] [ext-3.c] - Blame information for rev 338