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[/] [openrisc/] [tags/] [gnu-src/] [gcc-4.5.1/] [gcc-4.5.1-or32-1.0rc1/] [gcc/] [testsuite/] [gcc.target/] [powerpc/] [altivec-cell-8.c] - Blame information for rev 338

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Line No. Rev Author Line
1 322 jeremybenn
/* { dg-do run { target { powerpc*-*-* && cell_hw } } } */
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/* { dg-do compile { target { powerpc*-*-* && { ! cell_hw } } } } */
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/* { dg-require-effective-target powerpc_ppu_ok } */
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/* { dg-options "-O2 -maltivec -mabi=altivec -mcpu=cell" } */
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#include <altivec.h>
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#include <string.h>
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extern void abort (void);
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typedef short int sint16;
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typedef signed char int8;
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int main1(void) __attribute__((noinline));
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int main1(void)
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{
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    sint16 test_vector[4] = { 1678, -2356, 19246, -17892 };
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    int8 test_dst[128] __attribute__(( aligned( 16 )));
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    float test_out[4] __attribute__(( aligned( 16 )));
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    int p;
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    for( p = 0; p < 24; ++p )
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    {
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        memset( test_dst, 0, 128 );
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        memcpy( &test_dst[p], test_vector, 8 );
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        {
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            vector float VR, VL, V;
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   /* load the righthand section of the misaligned vector */
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            VR = (vector float) vec_lvrx( 8, &test_dst[p] );
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            VL = (vector float) vec_lvlx( 0, &test_dst[p] );
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   /* Vector Shift Left Double by Octet Immediate, move the right hand section into the bytes */
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            VR = vec_vsldoi( VR, VR, 2 << 2 );
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   /* or those two together */
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            V = vec_vor( VL, VR );
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   /* sign extend */
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            V = (vector float) vec_vupkhsh((vector bool short)V );
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   /* fixed to float by S16_SHIFT_BITS bits */
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            V = (vector float) vec_vcfsx ((vector signed int)V, 5 );
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            vec_stvx( V, 0, &test_out[0] );
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            if (test_out[0] != 52.437500)
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                abort ();
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            if (test_out[1] != -73.625000)
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                abort ();
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            if (test_out[2] != 601.437500)
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                abort ();
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            if (test_out[3] != -559.125000)
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                abort ();
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        }
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    }
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return 0;
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}
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int main(void)
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{
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  return main1();
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}

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