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Subversion Repositories openrisc

[/] [openrisc/] [tags/] [gnu-src/] [gcc-4.5.1/] [gcc-4.5.1-or32-1.0rc1/] [gcc/] [testsuite/] [gcc.target/] [powerpc/] [spe-vector-memcpy.c] - Blame information for rev 338

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/* { dg-do compile } */
/* { dg-options "-O -mcpu=8540 -mspe -mabi=spe -mfloat-gprs=single" } */
/* { dg-skip-if "not an SPE target" { ! powerpc_spe_nocache } { "*" } { "" } } */
/* { dg-final { scan-assembler "evstdd" } } */
 
void foo(void)
{
  int x[8] __attribute__((aligned(64))) = { 1, 1, 1, 1, 1, 1, 1, 1 };
  bar (x);
}

Line No.	Rev	Author	Line
1	322	jeremybenn	`/* { dg-do compile } */`
2			`/* { dg-options "-O -mcpu=8540 -mspe -mabi=spe -mfloat-gprs=single" } */`
3			`/* { dg-skip-if "not an SPE target" { ! powerpc_spe_nocache } { "" } { "" } } /`
4			`/* { dg-final { scan-assembler "evstdd" } } */`
5
6			`void foo(void)`
7			`{`
8			`int x[8] __attribute__((aligned(64))) = { 1, 1, 1, 1, 1, 1, 1, 1 };`
9			`bar (x);`
10			`}`

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[/] [openrisc/] [tags/] [gnu-src/] [gcc-4.5.1/] [gcc-4.5.1-or32-1.0rc1/] [gcc/] [testsuite/] [gcc.target/] [powerpc/] [spe-vector-memcpy.c] - Blame information for rev 338