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[/] [openrisc/] [tags/] [gnu-src/] [gcc-4.5.1/] [gcc-4.5.1-or32-1.0rc1/] [gcc/] [testsuite/] [gcc.target/] [sparc/] [fpsub32.c] - Blame information for rev 338

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/* { dg-do compile } */
/* { dg-options "-O -mcpu=ultrasparc -mvis" } */
typedef int vec32 __attribute__((vector_size(8)));
 
vec32 foo(vec32 a, vec32 b)
{
  return a - b;
}
 
/* { dg-final { scan-assembler "fpsub32\t%" } } */

Line No.	Rev	Author	Line
1	326	jeremybenn	`/* { dg-do compile } */`
2			`/* { dg-options "-O -mcpu=ultrasparc -mvis" } */`
3			`typedef int vec32 __attribute__((vector_size(8)));`
4
5			`vec32 foo(vec32 a, vec32 b)`
6			`{`
7			`return a - b;`
8			`}`
9
10			`/* { dg-final { scan-assembler "fpsub32\t%" } } */`

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Subversion Repositories openrisc

[/] [openrisc/] [tags/] [gnu-src/] [gcc-4.5.1/] [gcc-4.5.1-or32-1.0rc1/] [gcc/] [testsuite/] [gcc.target/] [sparc/] [fpsub32.c] - Blame information for rev 338