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[/] [openrisc/] [tags/] [gnu-src/] [gcc-4.5.1/] [gcc-4.5.1-or32-1.0rc2/] [gcc/] [config/] [m32c/] [jump.md] - Blame information for rev 384

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Line No. Rev Author Line
1 282 jeremybenn
;; Machine Descriptions for R8C/M16C/M32C
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;; Copyright (C) 2005, 2007, 2008
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;; Free Software Foundation, Inc.
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;; Contributed by Red Hat.
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;;
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;; This file is part of GCC.
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;;
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;; GCC is free software; you can redistribute it and/or modify it
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;; under the terms of the GNU General Public License as published
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;; by the Free Software Foundation; either version 3, or (at your
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;; option) any later version.
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;;
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;; GCC is distributed in the hope that it will be useful, but WITHOUT
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;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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;; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
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;; License for more details.
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;;
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;; You should have received a copy of the GNU General Public License
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;; along with GCC; see the file COPYING3.  If not see
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;; .
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;; jump, conditionals, calls, etc
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(define_insn "indirect_jump_16"
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  [(set (pc)
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       (match_operand:HI 0 "register_operand" "Rhi"))]
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  "TARGET_A16"
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;  "jmpi.a\t%0"
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  ; no 16-bit jmpi in r8c
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  "push.b #0 | push.w\t%0 | rts"
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  [(set_attr "flags" "x")]
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  )
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(define_insn "indirect_jump_24"
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  [(set (pc)
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       (match_operand:PSI 0 "register_operand" "Rpi"))]
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  "TARGET_A24"
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  "jmpi.a\t%0"
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  [(set_attr "flags" "n")]
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  )
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(define_expand "indirect_jump"
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  [(match_operand 0 "register_operand" "")]
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  ""
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  "if (TARGET_A16)
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     emit_jump_insn (gen_indirect_jump_16(operands[0]));
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   else
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     emit_jump_insn (gen_indirect_jump_24(operands[0]));
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   DONE;"
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  )
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; We can replace this with jmp.s when gas supports relaxing.  m32c
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; opcodes are too complicated to try to compute their sizes here, it's
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; far easier (and more reliable) to let gas worry about it.
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(define_insn "jump"
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  [(set (pc)
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        (label_ref (match_operand 0 "" "")))]
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  ""
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  "jmp.a\t%l0"
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  [(set_attr "flags" "n")]
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)
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; No 16-bit indirect calls on r8c/m16c.  */
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(define_insn "call"
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  [(call (match_operand:QI 0 "memory_operand" "Si,SaSb,?Rmm")
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         (match_operand 1 "" ""))
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   (use (match_operand 2 "immediate_operand" ""))]
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  ""
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  "*
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switch (which_alternative) {
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  case 0:
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    {
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      HOST_WIDE_INT func_vect_num =
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      current_function_special_page_vector(XEXP (operands[0], 0));
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      if (func_vect_num)
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        {
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          operands[3] = gen_rtx_CONST_INT (VOIDmode, func_vect_num);
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          return \"jsrs\t%3\";
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        }
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      else
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        return \"jsr.a\t%0\";
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    }
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  case 1: return TARGET_A16 ? \"push.w %a0 | jsr.a\tm32c_jsri16\" : \"jsri.a\t%a0\";
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  case 2: return \"jsri.a\t%a0\";
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}"
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  [(set_attr "flags" "x")]
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  )
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(define_insn "call_value"
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  [(set (match_operand 0 "m32c_return_operand" "=RdiRmmRpa,RdiRmmRpa,RdiRmmRpa")
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        (call (match_operand:QI 1 "memory_operand" "Si,SaSb,?Rmm")
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              (match_operand 2 "" "")))
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   (use (match_operand 3 "immediate_operand" ""))]
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  ""
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  "*
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switch (which_alternative) {
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  case 0:
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    {
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      HOST_WIDE_INT func_vect_num =
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      current_function_special_page_vector(XEXP (operands[1], 0));
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      if (func_vect_num)
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        {
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          operands[4] = gen_rtx_CONST_INT (VOIDmode, func_vect_num);
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          return \"jsrs\t%4\";
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        }
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      else
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        return \"jsr.a\t%1\";
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    }
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  case 1: return TARGET_A16 ? \"push.w %a1 | jsr.a\tm32c_jsri16\" : \"jsri.a\t%a1\";
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  case 2: return \"jsri.a\t%a1\";
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}"
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  [(set_attr "flags" "x,x,x")]
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  )
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(define_expand "untyped_call"
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  [(parallel [(call (match_operand 0 "" "")
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                    (const_int 0))
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              (match_operand 1 "" "")
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              (match_operand 2 "" "")])]
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  ""
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  "
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{
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  int i;
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  emit_call_insn (gen_call (operands[0], const0_rtx, const0_rtx));
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  for (i = 0; i < XVECLEN (operands[2], 0); i++)
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    {
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      rtx set = XVECEXP (operands[2], 0, i);
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      emit_move_insn (SET_DEST (set), SET_SRC (set));
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    }
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  DONE;
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}")

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