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[/] [openrisc/] [tags/] [gnu-src/] [gcc-4.5.1/] [gcc-4.5.1-or32-1.0rc2/] [gcc/] [config/] [pa/] [pa.h] - Blame information for rev 437

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Line No. Rev Author Line
1 282 jeremybenn
/* Definitions of target machine for GNU compiler, for the HP Spectrum.
2
   Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001,
3
   2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
4
   Free Software Foundation, Inc.
5
   Contributed by Michael Tiemann (tiemann@cygnus.com) of Cygnus Support
6
   and Tim Moore (moore@defmacro.cs.utah.edu) of the Center for
7
   Software Science at the University of Utah.
8
 
9
This file is part of GCC.
10
 
11
GCC is free software; you can redistribute it and/or modify
12
it under the terms of the GNU General Public License as published by
13
the Free Software Foundation; either version 3, or (at your option)
14
any later version.
15
 
16
GCC is distributed in the hope that it will be useful,
17
but WITHOUT ANY WARRANTY; without even the implied warranty of
18
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
19
GNU General Public License for more details.
20
 
21
You should have received a copy of the GNU General Public License
22
along with GCC; see the file COPYING3.  If not see
23
<http://www.gnu.org/licenses/>.  */
24
 
25
/* For long call handling.  */
26
extern unsigned long total_code_bytes;
27
 
28
/* Which processor to schedule for.  */
29
 
30
enum processor_type
31
{
32
  PROCESSOR_700,
33
  PROCESSOR_7100,
34
  PROCESSOR_7100LC,
35
  PROCESSOR_7200,
36
  PROCESSOR_7300,
37
  PROCESSOR_8000
38
};
39
 
40
/* For -mschedule= option.  */
41
extern enum processor_type pa_cpu;
42
 
43
/* For -munix= option.  */
44
extern int flag_pa_unix;
45
 
46
#define pa_cpu_attr ((enum attr_cpu)pa_cpu)
47
 
48
/* Print subsidiary information on the compiler version in use.  */
49
 
50
#define TARGET_VERSION fputs (" (hppa)", stderr);
51
 
52
#define TARGET_PA_10 (!TARGET_PA_11 && !TARGET_PA_20)
53
 
54
/* Generate code for the HPPA 2.0 architecture in 64bit mode.  */
55
#ifndef TARGET_64BIT
56
#define TARGET_64BIT 0
57
#endif
58
 
59
/* Generate code for ELF32 ABI.  */
60
#ifndef TARGET_ELF32
61
#define TARGET_ELF32 0
62
#endif
63
 
64
/* Generate code for SOM 32bit ABI.  */
65
#ifndef TARGET_SOM
66
#define TARGET_SOM 0
67
#endif
68
 
69
/* HP-UX UNIX features.  */
70
#ifndef TARGET_HPUX
71
#define TARGET_HPUX 0
72
#endif
73
 
74
/* HP-UX 10.10 UNIX 95 features.  */
75
#ifndef TARGET_HPUX_10_10
76
#define TARGET_HPUX_10_10 0
77
#endif
78
 
79
/* HP-UX 11.* features (11.00, 11.11, 11.23, etc.)  */
80
#ifndef TARGET_HPUX_11
81
#define TARGET_HPUX_11 0
82
#endif
83
 
84
/* HP-UX 11i multibyte and UNIX 98 extensions.  */
85
#ifndef TARGET_HPUX_11_11
86
#define TARGET_HPUX_11_11 0
87
#endif
88
 
89
/* The following three defines are potential target switches.  The current
90
   defines are optimal given the current capabilities of GAS and GNU ld.  */
91
 
92
/* Define to a C expression evaluating to true to use long absolute calls.
93
   Currently, only the HP assembler and SOM linker support long absolute
94
   calls.  They are used only in non-pic code.  */
95
#define TARGET_LONG_ABS_CALL (TARGET_SOM && !TARGET_GAS)
96
 
97
/* Define to a C expression evaluating to true to use long PIC symbol
98
   difference calls.  Long PIC symbol difference calls are only used with
99
   the HP assembler and linker.  The HP assembler detects this instruction
100
   sequence and treats it as long pc-relative call.  Currently, GAS only
101
   allows a difference of two symbols in the same subspace, and it doesn't
102
   detect the sequence as a pc-relative call.  */
103
#define TARGET_LONG_PIC_SDIFF_CALL (!TARGET_GAS && TARGET_HPUX)
104
 
105
/* Define to a C expression evaluating to true to use long PIC
106
   pc-relative calls.  Long PIC pc-relative calls are only used with
107
   GAS.  Currently, they are usable for calls which bind local to a
108
   module but not for external calls.  */
109
#define TARGET_LONG_PIC_PCREL_CALL 0
110
 
111
/* Define to a C expression evaluating to true to use SOM secondary
112
   definition symbols for weak support.  Linker support for secondary
113
   definition symbols is buggy prior to HP-UX 11.X.  */
114
#define TARGET_SOM_SDEF 0
115
 
116
/* Define to a C expression evaluating to true to save the entry value
117
   of SP in the current frame marker.  This is normally unnecessary.
118
   However, the HP-UX unwind library looks at the SAVE_SP callinfo flag.
119
   HP compilers don't use this flag but it is supported by the assembler.
120
   We set this flag to indicate that register %r3 has been saved at the
121
   start of the frame.  Thus, when the HP unwind library is used, we
122
   need to generate additional code to save SP into the frame marker.  */
123
#define TARGET_HPUX_UNWIND_LIBRARY 0
124
 
125
#ifndef TARGET_DEFAULT
126
#define TARGET_DEFAULT (MASK_GAS | MASK_JUMP_IN_DELAY | MASK_BIG_SWITCH)
127
#endif
128
 
129
#ifndef TARGET_CPU_DEFAULT
130
#define TARGET_CPU_DEFAULT 0
131
#endif
132
 
133
#ifndef TARGET_SCHED_DEFAULT
134
#define TARGET_SCHED_DEFAULT PROCESSOR_8000
135
#endif
136
 
137
/* Support for a compile-time default CPU, et cetera.  The rules are:
138
   --with-schedule is ignored if -mschedule is specified.
139
   --with-arch is ignored if -march is specified.  */
140
#define OPTION_DEFAULT_SPECS \
141
  {"arch", "%{!march=*:-march=%(VALUE)}" }, \
142
  {"schedule", "%{!mschedule=*:-mschedule=%(VALUE)}" }
143
 
144
/* Specify the dialect of assembler to use.  New mnemonics is dialect one
145
   and the old mnemonics are dialect zero.  */
146
#define ASSEMBLER_DIALECT (TARGET_PA_20 ? 1 : 0)
147
 
148
#define OVERRIDE_OPTIONS override_options ()
149
 
150
/* Override some settings from dbxelf.h.  */
151
 
152
/* We do not have to be compatible with dbx, so we enable gdb extensions
153
   by default.  */
154
#define DEFAULT_GDB_EXTENSIONS 1
155
 
156
/* This used to be zero (no max length), but big enums and such can
157
   cause huge strings which killed gas.
158
 
159
   We also have to avoid lossage in dbxout.c -- it does not compute the
160
   string size accurately, so we are real conservative here.  */
161
#undef DBX_CONTIN_LENGTH
162
#define DBX_CONTIN_LENGTH 3000
163
 
164
/* GDB always assumes the current function's frame begins at the value
165
   of the stack pointer upon entry to the current function.  Accessing
166
   local variables and parameters passed on the stack is done using the
167
   base of the frame + an offset provided by GCC.
168
 
169
   For functions which have frame pointers this method works fine;
170
   the (frame pointer) == (stack pointer at function entry) and GCC provides
171
   an offset relative to the frame pointer.
172
 
173
   This loses for functions without a frame pointer; GCC provides an offset
174
   which is relative to the stack pointer after adjusting for the function's
175
   frame size.  GDB would prefer the offset to be relative to the value of
176
   the stack pointer at the function's entry.  Yuk!  */
177
#define DEBUGGER_AUTO_OFFSET(X) \
178
  ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) \
179
    + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0)))
180
 
181
#define DEBUGGER_ARG_OFFSET(OFFSET, X) \
182
  ((GET_CODE (X) == PLUS ? OFFSET : 0) \
183
    + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0)))
184
 
185
#define TARGET_CPU_CPP_BUILTINS()                               \
186
do {                                                            \
187
     builtin_assert("cpu=hppa");                                \
188
     builtin_assert("machine=hppa");                            \
189
     builtin_define("__hppa");                                  \
190
     builtin_define("__hppa__");                                \
191
     if (TARGET_PA_20)                                          \
192
       builtin_define("_PA_RISC2_0");                           \
193
     else if (TARGET_PA_11)                                     \
194
       builtin_define("_PA_RISC1_1");                           \
195
     else                                                       \
196
       builtin_define("_PA_RISC1_0");                           \
197
} while (0)
198
 
199
/* An old set of OS defines for various BSD-like systems.  */
200
#define TARGET_OS_CPP_BUILTINS()                                \
201
  do                                                            \
202
    {                                                           \
203
        builtin_define_std ("REVARGV");                         \
204
        builtin_define_std ("hp800");                           \
205
        builtin_define_std ("hp9000");                          \
206
        builtin_define_std ("hp9k8");                           \
207
        if (!c_dialect_cxx () && !flag_iso)                     \
208
          builtin_define ("hppa");                              \
209
        builtin_define_std ("spectrum");                        \
210
        builtin_define_std ("unix");                            \
211
        builtin_assert ("system=bsd");                          \
212
        builtin_assert ("system=unix");                         \
213
    }                                                           \
214
  while (0)
215
 
216
#define CC1_SPEC "%{pg:} %{p:}"
217
 
218
#define LINK_SPEC "%{mlinker-opt:-O} %{!shared:-u main} %{shared:-b}"
219
 
220
/* We don't want -lg.  */
221
#ifndef LIB_SPEC
222
#define LIB_SPEC "%{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}"
223
#endif
224
 
225
/* This macro defines command-line switches that modify the default
226
   target name.
227
 
228
   The definition is be an initializer for an array of structures.  Each
229
   array element has have three elements: the switch name, one of the
230
   enumeration codes ADD or DELETE to indicate whether the string should be
231
   inserted or deleted, and the string to be inserted or deleted.  */
232
#define MODIFY_TARGET_NAME {{"-32", DELETE, "64"}, {"-64", ADD, "64"}}
233
 
234
/* Make gcc agree with <machine/ansi.h> */
235
 
236
#define SIZE_TYPE "unsigned int"
237
#define PTRDIFF_TYPE "int"
238
#define WCHAR_TYPE "unsigned int"
239
#define WCHAR_TYPE_SIZE 32
240
 
241
/* Show we can debug even without a frame pointer.  */
242
#define CAN_DEBUG_WITHOUT_FP
243
 
244
/* target machine storage layout */
245
typedef struct GTY(()) machine_function
246
{
247
  /* Flag indicating that a .NSUBSPA directive has been output for
248
     this function.  */
249
  int in_nsubspa;
250
} machine_function;
251
 
252
/* Define this macro if it is advisable to hold scalars in registers
253
   in a wider mode than that declared by the program.  In such cases,
254
   the value is constrained to be within the bounds of the declared
255
   type, but kept valid in the wider mode.  The signedness of the
256
   extension may differ from that of the type.  */
257
 
258
#define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE)  \
259
  if (GET_MODE_CLASS (MODE) == MODE_INT \
260
      && GET_MODE_SIZE (MODE) < UNITS_PER_WORD)         \
261
    (MODE) = word_mode;
262
 
263
/* Define this if most significant bit is lowest numbered
264
   in instructions that operate on numbered bit-fields.  */
265
#define BITS_BIG_ENDIAN 1
266
 
267
/* Define this if most significant byte of a word is the lowest numbered.  */
268
/* That is true on the HP-PA.  */
269
#define BYTES_BIG_ENDIAN 1
270
 
271
/* Define this if most significant word of a multiword number is lowest
272
   numbered.  */
273
#define WORDS_BIG_ENDIAN 1
274
 
275
#define MAX_BITS_PER_WORD 64
276
 
277
/* Width of a word, in units (bytes).  */
278
#define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4)
279
 
280
/* Minimum number of units in a word.  If this is undefined, the default
281
   is UNITS_PER_WORD.  Otherwise, it is the constant value that is the
282
   smallest value that UNITS_PER_WORD can have at run-time.
283
 
284
   FIXME: This needs to be 4 when TARGET_64BIT is true to suppress the
285
   building of various TImode routines in libgcc.  The HP runtime
286
   specification doesn't provide the alignment requirements and calling
287
   conventions for TImode variables.  */
288
#define MIN_UNITS_PER_WORD 4
289
 
290
/* The widest floating point format supported by the hardware.  Note that
291
   setting this influences some Ada floating point type sizes, currently
292
   required for GNAT to operate properly.  */
293
#define WIDEST_HARDWARE_FP_SIZE 64
294
 
295
/* Allocation boundary (in *bits*) for storing arguments in argument list.  */
296
#define PARM_BOUNDARY BITS_PER_WORD
297
 
298
/* Largest alignment required for any stack parameter, in bits.
299
   Don't define this if it is equal to PARM_BOUNDARY */
300
#define MAX_PARM_BOUNDARY BIGGEST_ALIGNMENT
301
 
302
/* Boundary (in *bits*) on which stack pointer is always aligned;
303
   certain optimizations in combine depend on this.
304
 
305
   The HP-UX runtime documents mandate 64-byte and 16-byte alignment for
306
   the stack on the 32 and 64-bit ports, respectively.  However, we
307
   are only guaranteed that the stack is aligned to BIGGEST_ALIGNMENT
308
   in main.  Thus, we treat the former as the preferred alignment.  */
309
#define STACK_BOUNDARY BIGGEST_ALIGNMENT
310
#define PREFERRED_STACK_BOUNDARY (TARGET_64BIT ? 128 : 512)
311
 
312
/* Allocation boundary (in *bits*) for the code of a function.  */
313
#define FUNCTION_BOUNDARY BITS_PER_WORD
314
 
315
/* Alignment of field after `int : 0' in a structure.  */
316
#define EMPTY_FIELD_BOUNDARY 32
317
 
318
/* Every structure's size must be a multiple of this.  */
319
#define STRUCTURE_SIZE_BOUNDARY 8
320
 
321
/* A bit-field declared as `int' forces `int' alignment for the struct.  */
322
#define PCC_BITFIELD_TYPE_MATTERS 1
323
 
324
/* No data type wants to be aligned rounder than this.  */
325
#define BIGGEST_ALIGNMENT (2 * BITS_PER_WORD)
326
 
327
/* Get around hp-ux assembler bug, and make strcpy of constants fast.  */
328 378 julius
#define CONSTANT_ALIGNMENT(EXP, ALIGN)          \
329
  (TREE_CODE (EXP) == STRING_CST                \
330
   && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
331 282 jeremybenn
 
332
/* Make arrays of chars word-aligned for the same reasons.  */
333
#define DATA_ALIGNMENT(TYPE, ALIGN)             \
334
  (TREE_CODE (TYPE) == ARRAY_TYPE               \
335
   && TYPE_MODE (TREE_TYPE (TYPE)) == QImode    \
336
   && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
337
 
338
/* Set this nonzero if move instructions will actually fail to work
339
   when given unaligned data.  */
340
#define STRICT_ALIGNMENT 1
341
 
342
/* Value is 1 if it is a good idea to tie two pseudo registers
343
   when one has mode MODE1 and one has mode MODE2.
344
   If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
345
   for any hard reg, then this must be 0 for correct output.  */
346
#define MODES_TIEABLE_P(MODE1, MODE2) \
347
  pa_modes_tieable_p (MODE1, MODE2)
348
 
349
/* Specify the registers used for certain standard purposes.
350
   The values of these macros are register numbers.  */
351
 
352
/* The HP-PA pc isn't overloaded on a register that the compiler knows about.  */
353
/* #define PC_REGNUM  */
354
 
355
/* Register to use for pushing function arguments.  */
356
#define STACK_POINTER_REGNUM 30
357
 
358
/* Base register for access to local variables of the function.  */
359
#define FRAME_POINTER_REGNUM 3
360
 
361
/* Don't allow hard registers to be renamed into r2 unless r2
362
   is already live or already being saved (due to eh).  */
363
 
364
#define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \
365
  ((NEW_REG) != 2 || df_regs_ever_live_p (2) || crtl->calls_eh_return)
366
 
367
/* C statement to store the difference between the frame pointer
368
   and the stack pointer values immediately after the function prologue.
369
 
370
   Note, we always pretend that this is a leaf function because if
371
   it's not, there's no point in trying to eliminate the
372
   frame pointer.  If it is a leaf function, we guessed right!  */
373
#define INITIAL_FRAME_POINTER_OFFSET(VAR) \
374
  do {(VAR) = - compute_frame_size (get_frame_size (), 0);} while (0)
375
 
376
/* Base register for access to arguments of the function.  */
377
#define ARG_POINTER_REGNUM (TARGET_64BIT ? 29 : 3)
378
 
379
/* Register in which static-chain is passed to a function.  */
380
#define STATIC_CHAIN_REGNUM (TARGET_64BIT ? 31 : 29)
381
 
382
/* Register used to address the offset table for position-independent
383
   data references.  */
384
#define PIC_OFFSET_TABLE_REGNUM \
385
  (flag_pic ? (TARGET_64BIT ? 27 : 19) : INVALID_REGNUM)
386
 
387
#define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED 1
388
 
389
/* Function to return the rtx used to save the pic offset table register
390
   across function calls.  */
391
extern struct rtx_def *hppa_pic_save_rtx (void);
392
 
393
#define DEFAULT_PCC_STRUCT_RETURN 0
394
 
395
/* Register in which address to store a structure value
396
   is passed to a function.  */
397
#define PA_STRUCT_VALUE_REGNUM 28
398
 
399
/* Describe how we implement __builtin_eh_return.  */
400
#define EH_RETURN_DATA_REGNO(N) \
401
  ((N) < 3 ? (N) + 20 : (N) == 3 ? 31 : INVALID_REGNUM)
402
#define EH_RETURN_STACKADJ_RTX  gen_rtx_REG (Pmode, 29)
403
#define EH_RETURN_HANDLER_RTX pa_eh_return_handler_rtx ()
404
 
405
/* Offset from the frame pointer register value to the top of stack.  */
406
#define FRAME_POINTER_CFA_OFFSET(FNDECL) 0
407
 
408
/* A C expression whose value is RTL representing the location of the
409
   incoming return address at the beginning of any function, before the
410
   prologue.  You only need to define this macro if you want to support
411
   call frame debugging information like that provided by DWARF 2.  */
412
#define INCOMING_RETURN_ADDR_RTX (gen_rtx_REG (word_mode, 2))
413
#define DWARF_FRAME_RETURN_COLUMN (DWARF_FRAME_REGNUM (2))
414
 
415
/* A C expression whose value is an integer giving a DWARF 2 column
416
   number that may be used as an alternate return column.  This should
417
   be defined only if DWARF_FRAME_RETURN_COLUMN is set to a general
418
   register, but an alternate column needs to be used for signal frames.
419
 
420
   Column 0 is not used but unfortunately its register size is set to
421
   4 bytes (sizeof CCmode) so it can't be used on 64-bit targets.  */
422
#define DWARF_ALT_FRAME_RETURN_COLUMN FIRST_PSEUDO_REGISTER
423
 
424
/* This macro chooses the encoding of pointers embedded in the exception
425
   handling sections.  If at all possible, this should be defined such
426
   that the exception handling section will not require dynamic relocations,
427
   and so may be read-only.
428
 
429
   Because the HP assembler auto aligns, it is necessary to use
430
   DW_EH_PE_aligned.  It's not possible to make the data read-only
431
   on the HP-UX SOM port since the linker requires fixups for label
432
   differences in different sections to be word aligned.  However,
433
   the SOM linker can do unaligned fixups for absolute pointers.
434
   We also need aligned pointers for global and function pointers.
435
 
436
   Although the HP-UX 64-bit ELF linker can handle unaligned pc-relative
437
   fixups, the runtime doesn't have a consistent relationship between
438
   text and data for dynamically loaded objects.  Thus, it's not possible
439
   to use pc-relative encoding for pointers on this target.  It may be
440
   possible to use segment relative encodings but GAS doesn't currently
441
   have a mechanism to generate these encodings.  For other targets, we
442
   use pc-relative encoding for pointers.  If the pointer might require
443
   dynamic relocation, we make it indirect.  */
444
#define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL)                       \
445
  (TARGET_GAS && !TARGET_HPUX                                           \
446
   ? (DW_EH_PE_pcrel                                                    \
447
      | ((GLOBAL) || (CODE) == 2 ? DW_EH_PE_indirect : 0)                \
448
      | (TARGET_64BIT ? DW_EH_PE_sdata8 : DW_EH_PE_sdata4))             \
449
   : (!TARGET_GAS || (GLOBAL) || (CODE) == 2                            \
450
      ? DW_EH_PE_aligned : DW_EH_PE_absptr))
451
 
452
/* Handle special EH pointer encodings.  Absolute, pc-relative, and
453
   indirect are handled automatically.  We output pc-relative, and
454
   indirect pc-relative ourself since we need some special magic to
455
   generate pc-relative relocations, and to handle indirect function
456
   pointers.  */
457
#define ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX(FILE, ENCODING, SIZE, ADDR, DONE) \
458
  do {                                                                  \
459
    if (((ENCODING) & 0x70) == DW_EH_PE_pcrel)                          \
460
      {                                                                 \
461
        fputs (integer_asm_op (SIZE, FALSE), FILE);                     \
462
        if ((ENCODING) & DW_EH_PE_indirect)                             \
463
          output_addr_const (FILE, get_deferred_plabel (ADDR));         \
464
        else                                                            \
465
          assemble_name (FILE, XSTR ((ADDR), 0));                        \
466
        fputs ("+8-$PIC_pcrel$0", FILE);                                \
467
        goto DONE;                                                      \
468
      }                                                                 \
469
    } while (0)
470
 
471
 
472
/* The class value for index registers, and the one for base regs.  */
473
#define INDEX_REG_CLASS GENERAL_REGS
474
#define BASE_REG_CLASS GENERAL_REGS
475
 
476
#define FP_REG_CLASS_P(CLASS) \
477
  ((CLASS) == FP_REGS || (CLASS) == FPUPPER_REGS)
478
 
479
/* True if register is floating-point.  */
480
#define FP_REGNO_P(N) ((N) >= FP_REG_FIRST && (N) <= FP_REG_LAST)
481
 
482
/* Given an rtx X being reloaded into a reg required to be
483
   in class CLASS, return the class of reg to actually use.
484
   In general this is just CLASS; but on some machines
485
   in some cases it is preferable to use a more restrictive class.  */
486
#define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
487
 
488
#define MAYBE_FP_REG_CLASS_P(CLASS) \
489
  reg_classes_intersect_p ((CLASS), FP_REGS)
490
 
491
 
492
/* Stack layout; function entry, exit and calling.  */
493
 
494
/* Define this if pushing a word on the stack
495
   makes the stack pointer a smaller address.  */
496
/* #define STACK_GROWS_DOWNWARD */
497
 
498
/* Believe it or not.  */
499
#define ARGS_GROW_DOWNWARD
500
 
501
/* Define this to nonzero if the nominal address of the stack frame
502
   is at the high-address end of the local variables;
503
   that is, each additional local variable allocated
504
   goes at a more negative offset in the frame.  */
505
#define FRAME_GROWS_DOWNWARD 0
506
 
507
/* Offset within stack frame to start allocating local variables at.
508
   If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
509
   first local allocated.  Otherwise, it is the offset to the BEGINNING
510
   of the first local allocated.
511
 
512
   On the 32-bit ports, we reserve one slot for the previous frame
513
   pointer and one fill slot.  The fill slot is for compatibility
514
   with HP compiled programs.  On the 64-bit ports, we reserve one
515
   slot for the previous frame pointer.  */
516
#define STARTING_FRAME_OFFSET 8
517
 
518
/* Define STACK_ALIGNMENT_NEEDED to zero to disable final alignment
519
   of the stack.  The default is to align it to STACK_BOUNDARY.  */
520
#define STACK_ALIGNMENT_NEEDED 0
521
 
522
/* If we generate an insn to push BYTES bytes,
523
   this says how many the stack pointer really advances by.
524
   On the HP-PA, don't define this because there are no push insns.  */
525
/*  #define PUSH_ROUNDING(BYTES) */
526
 
527
/* Offset of first parameter from the argument pointer register value.
528
   This value will be negated because the arguments grow down.
529
   Also note that on STACK_GROWS_UPWARD machines (such as this one)
530
   this is the distance from the frame pointer to the end of the first
531
   argument, not it's beginning.  To get the real offset of the first
532
   argument, the size of the argument must be added.  */
533
 
534
#define FIRST_PARM_OFFSET(FNDECL) (TARGET_64BIT ? -64 : -32)
535
 
536
/* When a parameter is passed in a register, stack space is still
537
   allocated for it.  */
538
#define REG_PARM_STACK_SPACE(DECL) (TARGET_64BIT ? 64 : 16)
539
 
540
/* Define this if the above stack space is to be considered part of the
541
   space allocated by the caller.  */
542
#define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE) 1
543
 
544
/* Keep the stack pointer constant throughout the function.
545
   This is both an optimization and a necessity: longjmp
546
   doesn't behave itself when the stack pointer moves within
547
   the function!  */
548
#define ACCUMULATE_OUTGOING_ARGS 1
549
 
550
/* The weird HPPA calling conventions require a minimum of 48 bytes on
551
   the stack: 16 bytes for register saves, and 32 bytes for magic.
552
   This is the difference between the logical top of stack and the
553
   actual sp.
554
 
555
   On the 64-bit port, the HP C compiler allocates a 48-byte frame
556
   marker, although the runtime documentation only describes a 16
557
   byte marker.  For compatibility, we allocate 48 bytes.  */
558
#define STACK_POINTER_OFFSET \
559
  (TARGET_64BIT ? -(crtl->outgoing_args_size + 48): -32)
560
 
561
#define STACK_DYNAMIC_OFFSET(FNDECL)    \
562
  (TARGET_64BIT                         \
563
   ? (STACK_POINTER_OFFSET)             \
564
   : ((STACK_POINTER_OFFSET) - crtl->outgoing_args_size))
565
 
566
/* Value is 1 if returning from a function call automatically
567
   pops the arguments described by the number-of-args field in the call.
568
   FUNDECL is the declaration node of the function (as a tree),
569
   FUNTYPE is the data type of the function (as a tree),
570
   or for a library call it is an identifier node for the subroutine name.  */
571
 
572
#define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
573
 
574
/* Define how to find the value returned by a library function
575
   assuming the value has mode MODE.  */
576
 
577
#define LIBCALL_VALUE(MODE)     \
578
  gen_rtx_REG (MODE,                                                    \
579
               (! TARGET_SOFT_FLOAT                                     \
580
                && ((MODE) == SFmode || (MODE) == DFmode) ? 32 : 28))
581
 
582
/* 1 if N is a possible register number for a function value
583
   as seen by the caller.  */
584
 
585
#define FUNCTION_VALUE_REGNO_P(N) \
586
  ((N) == 28 || (! TARGET_SOFT_FLOAT && (N) == 32))
587
 
588
 
589
/* Define a data type for recording info about an argument list
590
   during the scan of that argument list.  This data type should
591
   hold all necessary information about the function itself
592
   and about the args processed so far, enough to enable macros
593
   such as FUNCTION_ARG to determine where the next arg should go.
594
 
595
   On the HP-PA, the WORDS field holds the number of words
596
   of arguments scanned so far (including the invisible argument,
597
   if any, which holds the structure-value-address).  Thus, 4 or
598
   more means all following args should go on the stack.
599
 
600
   The INCOMING field tracks whether this is an "incoming" or
601
   "outgoing" argument.
602
 
603
   The INDIRECT field indicates whether this is is an indirect
604
   call or not.
605
 
606
   The NARGS_PROTOTYPE field indicates that an argument does not
607
   have a prototype when it less than or equal to 0.  */
608
 
609
struct hppa_args {int words, nargs_prototype, incoming, indirect; };
610
 
611
#define CUMULATIVE_ARGS struct hppa_args
612
 
613
/* Initialize a variable CUM of type CUMULATIVE_ARGS
614
   for a call to a function whose data type is FNTYPE.
615
   For a library call, FNTYPE is 0.  */
616
 
617
#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
618
  (CUM).words = 0,                                                       \
619
  (CUM).incoming = 0,                                                    \
620
  (CUM).indirect = (FNTYPE) && !(FNDECL),                               \
621
  (CUM).nargs_prototype = (FNTYPE && TYPE_ARG_TYPES (FNTYPE)            \
622
                           ? (list_length (TYPE_ARG_TYPES (FNTYPE)) - 1 \
623
                              + (TYPE_MODE (TREE_TYPE (FNTYPE)) == BLKmode \
624
                                 || pa_return_in_memory (TREE_TYPE (FNTYPE), 0))) \
625
                           : 0)
626
 
627
 
628
 
629
/* Similar, but when scanning the definition of a procedure.  We always
630
   set NARGS_PROTOTYPE large so we never return a PARALLEL.  */
631
 
632
#define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,IGNORE) \
633
  (CUM).words = 0,                               \
634
  (CUM).incoming = 1,                           \
635
  (CUM).indirect = 0,                            \
636
  (CUM).nargs_prototype = 1000
637
 
638
/* Figure out the size in words of the function argument.  The size
639
   returned by this macro should always be greater than zero because
640
   we pass variable and zero sized objects by reference.  */
641
 
642
#define FUNCTION_ARG_SIZE(MODE, TYPE)   \
643
  ((((MODE) != BLKmode \
644
     ? (HOST_WIDE_INT) GET_MODE_SIZE (MODE) \
645
     : int_size_in_bytes (TYPE)) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
646
 
647
/* Update the data in CUM to advance over an argument
648
   of mode MODE and data type TYPE.
649
   (TYPE is null for libcalls where that information may not be available.)  */
650
 
651
#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED)                    \
652
{ (CUM).nargs_prototype--;                                              \
653
  (CUM).words += FUNCTION_ARG_SIZE(MODE, TYPE)                          \
654
    + (((CUM).words & 01) && (TYPE) != 0                         \
655
        && FUNCTION_ARG_SIZE(MODE, TYPE) > 1);                          \
656
}
657
 
658
/* Determine where to put an argument to a function.
659
   Value is zero to push the argument on the stack,
660
   or a hard register in which to store the argument.
661
 
662
   MODE is the argument's machine mode.
663
   TYPE is the data type of the argument (as a tree).
664
    This is null for libcalls where that information may
665
    not be available.
666
   CUM is a variable of type CUMULATIVE_ARGS which gives info about
667
    the preceding args and about the function being called.
668
   NAMED is nonzero if this argument is a named parameter
669
    (otherwise it is an extra parameter matching an ellipsis).
670
 
671
   On the HP-PA the first four words of args are normally in registers
672
   and the rest are pushed.  But any arg that won't entirely fit in regs
673
   is pushed.
674
 
675
   Arguments passed in registers are either 1 or 2 words long.
676
 
677
   The caller must make a distinction between calls to explicitly named
678
   functions and calls through pointers to functions -- the conventions
679
   are different!  Calls through pointers to functions only use general
680
   registers for the first four argument words.
681
 
682
   Of course all this is different for the portable runtime model
683
   HP wants everyone to use for ELF.  Ugh.  Here's a quick description
684
   of how it's supposed to work.
685
 
686
   1) callee side remains unchanged.  It expects integer args to be
687
   in the integer registers, float args in the float registers and
688
   unnamed args in integer registers.
689
 
690
   2) caller side now depends on if the function being called has
691
   a prototype in scope (rather than if it's being called indirectly).
692
 
693
      2a) If there is a prototype in scope, then arguments are passed
694
      according to their type (ints in integer registers, floats in float
695
      registers, unnamed args in integer registers.
696
 
697
      2b) If there is no prototype in scope, then floating point arguments
698
      are passed in both integer and float registers.  egad.
699
 
700
  FYI: The portable parameter passing conventions are almost exactly like
701
  the standard parameter passing conventions on the RS6000.  That's why
702
  you'll see lots of similar code in rs6000.h.  */
703
 
704
/* If defined, a C expression which determines whether, and in which
705
   direction, to pad out an argument with extra space.  */
706
#define FUNCTION_ARG_PADDING(MODE, TYPE) function_arg_padding ((MODE), (TYPE))
707
 
708
/* Specify padding for the last element of a block move between registers
709
   and memory.
710
 
711
   The 64-bit runtime specifies that objects need to be left justified
712
   (i.e., the normal justification for a big endian target).  The 32-bit
713
   runtime specifies right justification for objects smaller than 64 bits.
714
   We use a DImode register in the parallel for 5 to 7 byte structures
715
   so that there is only one element.  This allows the object to be
716
   correctly padded.  */
717
#define BLOCK_REG_PADDING(MODE, TYPE, FIRST) \
718
  function_arg_padding ((MODE), (TYPE))
719
 
720
/* Do not expect to understand this without reading it several times.  I'm
721
   tempted to try and simply it, but I worry about breaking something.  */
722
 
723
#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
724
  function_arg (&CUM, MODE, TYPE, NAMED)
725
 
726
/* If defined, a C expression that gives the alignment boundary, in
727
   bits, of an argument with the specified mode and type.  If it is
728
   not defined,  `PARM_BOUNDARY' is used for all arguments.  */
729
 
730
/* Arguments larger than one word are double word aligned.  */
731
 
732
#define FUNCTION_ARG_BOUNDARY(MODE, TYPE)                               \
733
  (((TYPE)                                                              \
734
    ? (integer_zerop (TYPE_SIZE (TYPE))                                 \
735
       || !TREE_CONSTANT (TYPE_SIZE (TYPE))                             \
736
       || int_size_in_bytes (TYPE) <= UNITS_PER_WORD)                   \
737
    : GET_MODE_SIZE(MODE) <= UNITS_PER_WORD)                            \
738
   ? PARM_BOUNDARY : MAX_PARM_BOUNDARY)
739
 
740
 
741
/* On HPPA, we emit profiling code as rtl via PROFILE_HOOK rather than
742
   as assembly via FUNCTION_PROFILER.  Just output a local label.
743
   We can't use the function label because the GAS SOM target can't
744
   handle the difference of a global symbol and a local symbol.  */
745
 
746
#ifndef FUNC_BEGIN_PROLOG_LABEL
747
#define FUNC_BEGIN_PROLOG_LABEL        "LFBP"
748
#endif
749
 
750
#define FUNCTION_PROFILER(FILE, LABEL) \
751
  (*targetm.asm_out.internal_label) (FILE, FUNC_BEGIN_PROLOG_LABEL, LABEL)
752
 
753
#define PROFILE_HOOK(label_no) hppa_profile_hook (label_no)
754
void hppa_profile_hook (int label_no);
755
 
756
/* The profile counter if emitted must come before the prologue.  */
757
#define PROFILE_BEFORE_PROLOGUE 1
758
 
759
/* We never want final.c to emit profile counters.  When profile
760
   counters are required, we have to defer emitting them to the end
761
   of the current file.  */
762
#define NO_PROFILE_COUNTERS 1
763
 
764
/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
765
   the stack pointer does not matter.  The value is tested only in
766
   functions that have frame pointers.
767
   No definition is equivalent to always zero.  */
768
 
769
extern int may_call_alloca;
770
 
771
#define EXIT_IGNORE_STACK       \
772
 (get_frame_size () != 0 \
773
  || cfun->calls_alloca || crtl->outgoing_args_size)
774
 
775
/* Length in units of the trampoline for entering a nested function.  */
776
 
777
#define TRAMPOLINE_SIZE (TARGET_64BIT ? 72 : 52)
778
 
779
/* Alignment required by the trampoline.  */
780
 
781
#define TRAMPOLINE_ALIGNMENT BITS_PER_WORD
782
 
783
/* Minimum length of a cache line.  A length of 16 will work on all
784
   PA-RISC processors.  All PA 1.1 processors have a cache line of
785
   32 bytes.  Most but not all PA 2.0 processors have a cache line
786
   of 64 bytes.  As cache flushes are expensive and we don't support
787
   PA 1.0, we use a minimum length of 32.  */
788
 
789
#define MIN_CACHELINE_SIZE 32
790
 
791
 
792
/* Addressing modes, and classification of registers for them.
793
 
794
   Using autoincrement addressing modes on PA8000 class machines is
795
   not profitable.  */
796
 
797
#define HAVE_POST_INCREMENT (pa_cpu < PROCESSOR_8000)
798
#define HAVE_POST_DECREMENT (pa_cpu < PROCESSOR_8000)
799
 
800
#define HAVE_PRE_DECREMENT (pa_cpu < PROCESSOR_8000)
801
#define HAVE_PRE_INCREMENT (pa_cpu < PROCESSOR_8000)
802
 
803
/* Macros to check register numbers against specific register classes.  */
804
 
805
/* The following macros assume that X is a hard or pseudo reg number.
806
   They give nonzero only if X is a hard reg of the suitable class
807
   or a pseudo reg currently allocated to a suitable hard reg.
808
   Since they use reg_renumber, they are safe only once reg_renumber
809
   has been allocated, which happens in local-alloc.c.  */
810
 
811
#define REGNO_OK_FOR_INDEX_P(X) \
812
  ((X) && ((X) < 32                                                     \
813
   || (X >= FIRST_PSEUDO_REGISTER                                       \
814
       && reg_renumber                                                  \
815
       && (unsigned) reg_renumber[X] < 32)))
816
#define REGNO_OK_FOR_BASE_P(X) \
817
  ((X) && ((X) < 32                                                     \
818
   || (X >= FIRST_PSEUDO_REGISTER                                       \
819
       && reg_renumber                                                  \
820
       && (unsigned) reg_renumber[X] < 32)))
821
#define REGNO_OK_FOR_FP_P(X) \
822
  (FP_REGNO_P (X)                                                       \
823
   || (X >= FIRST_PSEUDO_REGISTER                                       \
824
       && reg_renumber                                                  \
825
       && FP_REGNO_P (reg_renumber[X])))
826
 
827
/* Now macros that check whether X is a register and also,
828
   strictly, whether it is in a specified class.
829
 
830
   These macros are specific to the HP-PA, and may be used only
831
   in code for printing assembler insns and in conditions for
832
   define_optimization.  */
833
 
834
/* 1 if X is an fp register.  */
835
 
836
#define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
837
 
838
/* Maximum number of registers that can appear in a valid memory address.  */
839
 
840
#define MAX_REGS_PER_ADDRESS 2
841
 
842
/* Non-TLS symbolic references.  */
843
#define PA_SYMBOL_REF_TLS_P(RTX) \
844
  (GET_CODE (RTX) == SYMBOL_REF && SYMBOL_REF_TLS_MODEL (RTX) != 0)
845
 
846
/* Recognize any constant value that is a valid address except
847
   for symbolic addresses.  We get better CSE by rejecting them
848
   here and allowing hppa_legitimize_address to break them up.  We
849
   use most of the constants accepted by CONSTANT_P, except CONST_DOUBLE.  */
850
 
851
#define CONSTANT_ADDRESS_P(X) \
852
  ((GET_CODE (X) == LABEL_REF                                           \
853
   || (GET_CODE (X) == SYMBOL_REF && !SYMBOL_REF_TLS_MODEL (X))         \
854
   || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST                \
855
   || GET_CODE (X) == HIGH)                                             \
856
   && (reload_in_progress || reload_completed || ! symbolic_expression_p (X)))
857
 
858
/* A C expression that is nonzero if we are using the new HP assembler.  */
859
 
860
#ifndef NEW_HP_ASSEMBLER
861
#define NEW_HP_ASSEMBLER 0
862
#endif
863
 
864
/* The macros below define the immediate range for CONST_INTS on
865
   the 64-bit port.  Constants in this range can be loaded in three
866
   instructions using a ldil/ldo/depdi sequence.  Constants outside
867
   this range are forced to the constant pool prior to reload.  */
868
 
869
#define MAX_LEGIT_64BIT_CONST_INT ((HOST_WIDE_INT) 32 << 31)
870
#define MIN_LEGIT_64BIT_CONST_INT ((HOST_WIDE_INT) -32 << 31)
871
#define LEGITIMATE_64BIT_CONST_INT_P(X) \
872
  ((X) >= MIN_LEGIT_64BIT_CONST_INT && (X) < MAX_LEGIT_64BIT_CONST_INT)
873
 
874
/* A C expression that is nonzero if X is a legitimate constant for an
875
   immediate operand.
876
 
877
   We include all constant integers and constant doubles, but not
878
   floating-point, except for floating-point zero.  We reject LABEL_REFs
879
   if we're not using gas or the new HP assembler.
880
 
881
   In 64-bit mode, we reject CONST_DOUBLES.  We also reject CONST_INTS
882
   that need more than three instructions to load prior to reload.  This
883
   limit is somewhat arbitrary.  It takes three instructions to load a
884
   CONST_INT from memory but two are memory accesses.  It may be better
885
   to increase the allowed range for CONST_INTS.  We may also be able
886
   to handle CONST_DOUBLES.  */
887
 
888
#define LEGITIMATE_CONSTANT_P(X)                                \
889
  ((GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT                 \
890
    || (X) == CONST0_RTX (GET_MODE (X)))                        \
891
   && (NEW_HP_ASSEMBLER                                         \
892
       || TARGET_GAS                                            \
893
       || GET_CODE (X) != LABEL_REF)                            \
894
   && (!TARGET_64BIT                                            \
895
       || GET_CODE (X) != CONST_DOUBLE)                         \
896
   && (!TARGET_64BIT                                            \
897
       || HOST_BITS_PER_WIDE_INT <= 32                          \
898
       || GET_CODE (X) != CONST_INT                             \
899
       || reload_in_progress                                    \
900
       || reload_completed                                      \
901
       || LEGITIMATE_64BIT_CONST_INT_P (INTVAL (X))             \
902
       || cint_ok_for_move (INTVAL (X)))                        \
903
   && !function_label_operand (X, VOIDmode))
904
 
905
/* Target flags set on a symbol_ref.  */
906
 
907
/* Set by ASM_OUTPUT_SYMBOL_REF when a symbol_ref is output.  */
908
#define SYMBOL_FLAG_REFERENCED (1 << SYMBOL_FLAG_MACH_DEP_SHIFT)
909
#define SYMBOL_REF_REFERENCED_P(RTX) \
910
  ((SYMBOL_REF_FLAGS (RTX) & SYMBOL_FLAG_REFERENCED) != 0)
911
 
912
/* Defines for constraints.md.  */
913
 
914
/* Return 1 iff OP is a scaled or unscaled index address.  */
915
#define IS_INDEX_ADDR_P(OP) \
916
  (GET_CODE (OP) == PLUS                                \
917
   && GET_MODE (OP) == Pmode                            \
918
   && (GET_CODE (XEXP (OP, 0)) == MULT                   \
919
       || GET_CODE (XEXP (OP, 1)) == MULT               \
920
       || (REG_P (XEXP (OP, 0))                          \
921
           && REG_P (XEXP (OP, 1)))))
922
 
923
/* Return 1 iff OP is a LO_SUM DLT address.  */
924
#define IS_LO_SUM_DLT_ADDR_P(OP) \
925
  (GET_CODE (OP) == LO_SUM                              \
926
   && GET_MODE (OP) == Pmode                            \
927
   && REG_P (XEXP (OP, 0))                               \
928
   && REG_OK_FOR_BASE_P (XEXP (OP, 0))                   \
929
   && GET_CODE (XEXP (OP, 1)) == UNSPEC)
930
 
931
/* Nonzero if 14-bit offsets can be used for all loads and stores.
932
   This is not possible when generating PA 1.x code as floating point
933
   loads and stores only support 5-bit offsets.  Note that we do not
934
   forbid the use of 14-bit offsets in GO_IF_LEGITIMATE_ADDRESS.
935
   Instead, we use pa_secondary_reload() to reload integer mode
936
   REG+D memory addresses used in floating point loads and stores.
937
 
938
   FIXME: the ELF32 linker clobbers the LSB of the FP register number
939
   in PA 2.0 floating-point insns with long displacements.  This is
940
   because R_PARISC_DPREL14WR and other relocations like it are not
941
   yet supported by GNU ld.  For now, we reject long displacements
942
   on this target.  */
943
 
944
#define INT14_OK_STRICT \
945
  (TARGET_SOFT_FLOAT                                                   \
946
   || TARGET_DISABLE_FPREGS                                            \
947
   || (TARGET_PA_20 && !TARGET_ELF32))
948
 
949
/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
950
   and check its validity for a certain class.
951
   We have two alternate definitions for each of them.
952
   The usual definition accepts all pseudo regs; the other rejects
953
   them unless they have been allocated suitable hard regs.
954
   The symbol REG_OK_STRICT causes the latter definition to be used.
955
 
956
   Most source files want to accept pseudo regs in the hope that
957
   they will get allocated to the class that the insn wants them to be in.
958
   Source files for reload pass need to be strict.
959
   After reload, it makes no difference, since pseudo regs have
960
   been eliminated by then.  */
961
 
962
#ifndef REG_OK_STRICT
963
 
964
/* Nonzero if X is a hard reg that can be used as an index
965
   or if it is a pseudo reg.  */
966
#define REG_OK_FOR_INDEX_P(X) \
967
  (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
968
 
969
/* Nonzero if X is a hard reg that can be used as a base reg
970
   or if it is a pseudo reg.  */
971
#define REG_OK_FOR_BASE_P(X) \
972
  (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
973
 
974
#else
975
 
976
/* Nonzero if X is a hard reg that can be used as an index.  */
977
#define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
978
 
979
/* Nonzero if X is a hard reg that can be used as a base reg.  */
980
#define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
981
 
982
#endif
983
 
984
/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
985
   valid memory address for an instruction.  The MODE argument is the
986
   machine mode for the MEM expression that wants to use this address.
987
 
988
   On HP PA-RISC, the legitimate address forms are REG+SMALLINT,
989
   REG+REG, and REG+(REG*SCALE).  The indexed address forms are only
990
   available with floating point loads and stores, and integer loads.
991
   We get better code by allowing indexed addresses in the initial
992
   RTL generation.
993
 
994
   The acceptance of indexed addresses as legitimate implies that we
995
   must provide patterns for doing indexed integer stores, or the move
996
   expanders must force the address of an indexed store to a register.
997
   We have adopted the latter approach.
998
 
999
   Another function of GO_IF_LEGITIMATE_ADDRESS is to ensure that
1000
   the base register is a valid pointer for indexed instructions.
1001
   On targets that have non-equivalent space registers, we have to
1002
   know at the time of assembler output which register in a REG+REG
1003
   pair is the base register.  The REG_POINTER flag is sometimes lost
1004
   in reload and the following passes, so it can't be relied on during
1005
   code generation.  Thus, we either have to canonicalize the order
1006
   of the registers in REG+REG indexed addresses, or treat REG+REG
1007
   addresses separately and provide patterns for both permutations.
1008
 
1009
   The latter approach requires several hundred additional lines of
1010
   code in pa.md.  The downside to canonicalizing is that a PLUS
1011
   in the wrong order can't combine to form to make a scaled indexed
1012
   memory operand.  As we won't need to canonicalize the operands if
1013
   the REG_POINTER lossage can be fixed, it seems better canonicalize.
1014
 
1015
   We initially break out scaled indexed addresses in canonical order
1016
   in emit_move_sequence.  LEGITIMIZE_ADDRESS also canonicalizes
1017
   scaled indexed addresses during RTL generation.  However, fold_rtx
1018
   has its own opinion on how the operands of a PLUS should be ordered.
1019
   If one of the operands is equivalent to a constant, it will make
1020
   that operand the second operand.  As the base register is likely to
1021
   be equivalent to a SYMBOL_REF, we have made it the second operand.
1022
 
1023
   GO_IF_LEGITIMATE_ADDRESS accepts REG+REG as legitimate when the
1024
   operands are in the order INDEX+BASE on targets with non-equivalent
1025
   space registers, and in any order on targets with equivalent space
1026
   registers.  It accepts both MULT+BASE and BASE+MULT for scaled indexing.
1027
 
1028
   We treat a SYMBOL_REF as legitimate if it is part of the current
1029
   function's constant-pool, because such addresses can actually be
1030
   output as REG+SMALLINT.  */
1031
 
1032
#define VAL_5_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x10 < 0x20)
1033
#define INT_5_BITS(X) VAL_5_BITS_P (INTVAL (X))
1034
 
1035
#define VAL_U5_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) < 0x20)
1036
#define INT_U5_BITS(X) VAL_U5_BITS_P (INTVAL (X))
1037
 
1038
#define VAL_11_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x400 < 0x800)
1039
#define INT_11_BITS(X) VAL_11_BITS_P (INTVAL (X))
1040
 
1041
#define VAL_14_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x2000 < 0x4000)
1042
#define INT_14_BITS(X) VAL_14_BITS_P (INTVAL (X))
1043
 
1044
#if HOST_BITS_PER_WIDE_INT > 32
1045
#define VAL_32_BITS_P(X) \
1046
  ((unsigned HOST_WIDE_INT)(X) + ((unsigned HOST_WIDE_INT) 1 << 31)    \
1047
   < (unsigned HOST_WIDE_INT) 2 << 31)
1048
#else
1049
#define VAL_32_BITS_P(X) 1
1050
#endif
1051
#define INT_32_BITS(X) VAL_32_BITS_P (INTVAL (X))
1052
 
1053
/* These are the modes that we allow for scaled indexing.  */
1054
#define MODE_OK_FOR_SCALED_INDEXING_P(MODE) \
1055
  ((TARGET_64BIT && (MODE) == DImode)                                   \
1056
   || (MODE) == SImode                                                  \
1057
   || (MODE) == HImode                                                  \
1058
   || (MODE) == SFmode                                                  \
1059
   || (MODE) == DFmode)
1060
 
1061
/* These are the modes that we allow for unscaled indexing.  */
1062
#define MODE_OK_FOR_UNSCALED_INDEXING_P(MODE) \
1063
  ((TARGET_64BIT && (MODE) == DImode)                                   \
1064
   || (MODE) == SImode                                                  \
1065
   || (MODE) == HImode                                                  \
1066
   || (MODE) == QImode                                                  \
1067
   || (MODE) == SFmode                                                  \
1068
   || (MODE) == DFmode)
1069
 
1070
#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1071
{                                                                       \
1072
  if ((REG_P (X) && REG_OK_FOR_BASE_P (X))                              \
1073
      || ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_DEC          \
1074
           || GET_CODE (X) == PRE_INC || GET_CODE (X) == POST_INC)      \
1075
          && REG_P (XEXP (X, 0))                                 \
1076
          && REG_OK_FOR_BASE_P (XEXP (X, 0))))                           \
1077
    goto ADDR;                                                          \
1078
  else if (GET_CODE (X) == PLUS)                                        \
1079
    {                                                                   \
1080
      rtx base = 0, index = 0;                                            \
1081
      if (REG_P (XEXP (X, 1))                                           \
1082
          && REG_OK_FOR_BASE_P (XEXP (X, 1)))                           \
1083
        base = XEXP (X, 1), index = XEXP (X, 0);                 \
1084
      else if (REG_P (XEXP (X, 0))                                       \
1085
               && REG_OK_FOR_BASE_P (XEXP (X, 0)))                       \
1086
        base = XEXP (X, 0), index = XEXP (X, 1);                 \
1087
      if (base                                                          \
1088
          && GET_CODE (index) == CONST_INT                              \
1089
          && ((INT_14_BITS (index)                                      \
1090
               && (((MODE) != DImode                                    \
1091
                    && (MODE) != SFmode                                 \
1092
                    && (MODE) != DFmode)                                \
1093
                   /* The base register for DImode loads and stores     \
1094
                      with long displacements must be aligned because   \
1095
                      the lower three bits in the displacement are      \
1096
                      assumed to be zero.  */                           \
1097
                   || ((MODE) == DImode                                 \
1098
                       && (!TARGET_64BIT                                \
1099
                           || (INTVAL (index) % 8) == 0))                \
1100
                   /* Similarly, the base register for SFmode/DFmode    \
1101
                      loads and stores with long displacements must     \
1102
                      be aligned.  */                                   \
1103
                   || (((MODE) == SFmode || (MODE) == DFmode)           \
1104
                       && INT14_OK_STRICT                               \
1105
                       && (INTVAL (index) % GET_MODE_SIZE (MODE)) == 0))) \
1106
               || INT_5_BITS (index)))                                  \
1107
        goto ADDR;                                                      \
1108
      if (!TARGET_DISABLE_INDEXING                                      \
1109
          /* Only accept the "canonical" INDEX+BASE operand order       \
1110
             on targets with non-equivalent space registers.  */        \
1111
          && (TARGET_NO_SPACE_REGS                                      \
1112
              ? (base && REG_P (index))                                 \
1113
              : (base == XEXP (X, 1) && REG_P (index)                   \
1114
                 && (reload_completed                                   \
1115
                     || (reload_in_progress && HARD_REGISTER_P (base))  \
1116
                     || REG_POINTER (base))                             \
1117
                 && (reload_completed                                   \
1118
                     || (reload_in_progress && HARD_REGISTER_P (index)) \
1119
                     || !REG_POINTER (index))))                         \
1120
          && MODE_OK_FOR_UNSCALED_INDEXING_P (MODE)                     \
1121
          && REG_OK_FOR_INDEX_P (index)                                 \
1122
          && borx_reg_operand (base, Pmode)                             \
1123
          && borx_reg_operand (index, Pmode))                           \
1124
        goto ADDR;                                                      \
1125
      if (!TARGET_DISABLE_INDEXING                                      \
1126
          && base                                                       \
1127
          && GET_CODE (index) == MULT                                   \
1128
          && MODE_OK_FOR_SCALED_INDEXING_P (MODE)                       \
1129
          && REG_P (XEXP (index, 0))                                     \
1130
          && GET_MODE (XEXP (index, 0)) == Pmode                 \
1131
          && REG_OK_FOR_INDEX_P (XEXP (index, 0))                        \
1132
          && GET_CODE (XEXP (index, 1)) == CONST_INT                    \
1133
          && INTVAL (XEXP (index, 1))                                   \
1134
             == (HOST_WIDE_INT) GET_MODE_SIZE (MODE)                    \
1135
          && borx_reg_operand (base, Pmode))                            \
1136
        goto ADDR;                                                      \
1137
    }                                                                   \
1138
  else if (GET_CODE (X) == LO_SUM                                       \
1139
           && GET_CODE (XEXP (X, 0)) == REG                              \
1140
           && REG_OK_FOR_BASE_P (XEXP (X, 0))                            \
1141
           && CONSTANT_P (XEXP (X, 1))                                  \
1142
           && (TARGET_SOFT_FLOAT                                        \
1143
               /* We can allow symbolic LO_SUM addresses for PA2.0.  */ \
1144
               || (TARGET_PA_20                                         \
1145
                   && !TARGET_ELF32                                     \
1146
                   && GET_CODE (XEXP (X, 1)) != CONST_INT)              \
1147
               || ((MODE) != SFmode                                     \
1148
                   && (MODE) != DFmode)))                               \
1149
    goto ADDR;                                                          \
1150
  else if (GET_CODE (X) == LO_SUM                                       \
1151
           && GET_CODE (XEXP (X, 0)) == SUBREG                           \
1152
           && GET_CODE (SUBREG_REG (XEXP (X, 0))) == REG         \
1153
           && REG_OK_FOR_BASE_P (SUBREG_REG (XEXP (X, 0)))               \
1154
           && CONSTANT_P (XEXP (X, 1))                                  \
1155
           && (TARGET_SOFT_FLOAT                                        \
1156
               /* We can allow symbolic LO_SUM addresses for PA2.0.  */ \
1157
               || (TARGET_PA_20                                         \
1158
                   && !TARGET_ELF32                                     \
1159
                   && GET_CODE (XEXP (X, 1)) != CONST_INT)              \
1160
               || ((MODE) != SFmode                                     \
1161
                   && (MODE) != DFmode)))                               \
1162
    goto ADDR;                                                          \
1163
  else if (GET_CODE (X) == CONST_INT && INT_5_BITS (X))                 \
1164
    goto ADDR;                                                          \
1165
  /* Needed for -fPIC */                                                \
1166
  else if (GET_CODE (X) == LO_SUM                                       \
1167
           && GET_CODE (XEXP (X, 0)) == REG                      \
1168
           && REG_OK_FOR_BASE_P (XEXP (X, 0))                            \
1169
           && GET_CODE (XEXP (X, 1)) == UNSPEC                          \
1170
           && (TARGET_SOFT_FLOAT                                        \
1171
               || (TARGET_PA_20 && !TARGET_ELF32)                       \
1172
               || ((MODE) != SFmode                                     \
1173
                   && (MODE) != DFmode)))                               \
1174
    goto ADDR;                                                          \
1175
}
1176
 
1177
/* Look for machine dependent ways to make the invalid address AD a
1178
   valid address.
1179
 
1180
   For the PA, transform:
1181
 
1182
        memory(X + <large int>)
1183
 
1184
   into:
1185
 
1186
        if (<large int> & mask) >= 16
1187
          Y = (<large int> & ~mask) + mask + 1  Round up.
1188
        else
1189
          Y = (<large int> & ~mask)             Round down.
1190
        Z = X + Y
1191
        memory (Z + (<large int> - Y));
1192
 
1193
   This makes reload inheritance and reload_cse work better since Z
1194
   can be reused.
1195
 
1196
   There may be more opportunities to improve code with this hook.  */
1197
#define LEGITIMIZE_RELOAD_ADDRESS(AD, MODE, OPNUM, TYPE, IND, WIN)      \
1198
do {                                                                    \
1199
  long offset, newoffset, mask;                                         \
1200
  rtx new_rtx, temp = NULL_RTX;                                         \
1201
                                                                        \
1202
  mask = (GET_MODE_CLASS (MODE) == MODE_FLOAT                           \
1203
          ? (INT14_OK_STRICT ? 0x3fff : 0x1f) : 0x3fff);                \
1204
                                                                        \
1205
  if (optimize && GET_CODE (AD) == PLUS)                                \
1206
    temp = simplify_binary_operation (PLUS, Pmode,                      \
1207
                                      XEXP (AD, 0), XEXP (AD, 1));       \
1208
                                                                        \
1209
  new_rtx = temp ? temp : AD;                                           \
1210
                                                                        \
1211
  if (optimize                                                          \
1212
      && GET_CODE (new_rtx) == PLUS                                             \
1213
      && GET_CODE (XEXP (new_rtx, 0)) == REG                             \
1214
      && GET_CODE (XEXP (new_rtx, 1)) == CONST_INT)                             \
1215
    {                                                                   \
1216
      offset = INTVAL (XEXP ((new_rtx), 1));                            \
1217
                                                                        \
1218
      /* Choose rounding direction.  Round up if we are >= halfway.  */ \
1219
      if ((offset & mask) >= ((mask + 1) / 2))                          \
1220
        newoffset = (offset & ~mask) + mask + 1;                        \
1221
      else                                                              \
1222
        newoffset = offset & ~mask;                                     \
1223
                                                                        \
1224
      /* Ensure that long displacements are aligned.  */                \
1225
      if (mask == 0x3fff                                                \
1226
          && (GET_MODE_CLASS (MODE) == MODE_FLOAT                       \
1227
              || (TARGET_64BIT && (MODE) == DImode)))                   \
1228
        newoffset &= ~(GET_MODE_SIZE (MODE) - 1);                       \
1229
                                                                        \
1230
      if (newoffset != 0 && VAL_14_BITS_P (newoffset))                   \
1231
        {                                                               \
1232
          temp = gen_rtx_PLUS (Pmode, XEXP (new_rtx, 0),                 \
1233
                               GEN_INT (newoffset));                    \
1234
          AD = gen_rtx_PLUS (Pmode, temp, GEN_INT (offset - newoffset));\
1235
          push_reload (XEXP (AD, 0), 0, &XEXP (AD, 0), 0,           \
1236
                       BASE_REG_CLASS, Pmode, VOIDmode, 0, 0,             \
1237
                       (OPNUM), (TYPE));                                \
1238
          goto WIN;                                                     \
1239
        }                                                               \
1240
    }                                                                   \
1241
} while (0)
1242
 
1243
 
1244
 
1245
#define TARGET_ASM_SELECT_SECTION  pa_select_section
1246
 
1247
/* Return a nonzero value if DECL has a section attribute.  */
1248
#define IN_NAMED_SECTION_P(DECL) \
1249
  ((TREE_CODE (DECL) == FUNCTION_DECL || TREE_CODE (DECL) == VAR_DECL) \
1250
   && DECL_SECTION_NAME (DECL) != NULL_TREE)
1251
 
1252
/* Define this macro if references to a symbol must be treated
1253
   differently depending on something about the variable or
1254
   function named by the symbol (such as what section it is in).
1255
 
1256
   The macro definition, if any, is executed immediately after the
1257
   rtl for DECL or other node is created.
1258
   The value of the rtl will be a `mem' whose address is a
1259
   `symbol_ref'.
1260
 
1261
   The usual thing for this macro to do is to a flag in the
1262
   `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified
1263
   name string in the `symbol_ref' (if one bit is not enough
1264
   information).
1265
 
1266
   On the HP-PA we use this to indicate if a symbol is in text or
1267
   data space.  Also, function labels need special treatment.  */
1268
 
1269
#define TEXT_SPACE_P(DECL)\
1270
  (TREE_CODE (DECL) == FUNCTION_DECL                                    \
1271
   || (TREE_CODE (DECL) == VAR_DECL                                     \
1272
       && TREE_READONLY (DECL) && ! TREE_SIDE_EFFECTS (DECL)            \
1273
       && (! DECL_INITIAL (DECL) || ! reloc_needed (DECL_INITIAL (DECL))) \
1274
       && !flag_pic)                                                    \
1275
   || CONSTANT_CLASS_P (DECL))
1276
 
1277
#define FUNCTION_NAME_P(NAME)  (*(NAME) == '@')
1278
 
1279
/* Specify the machine mode that this machine uses for the index in the
1280
   tablejump instruction.  For small tables, an element consists of a
1281
   ia-relative branch and its delay slot.  When -mbig-switch is specified,
1282
   we use a 32-bit absolute address for non-pic code, and a 32-bit offset
1283
   for both 32 and 64-bit pic code.  */
1284
#define CASE_VECTOR_MODE (TARGET_BIG_SWITCH ? SImode : DImode)
1285
 
1286
/* Jump tables must be 32-bit aligned, no matter the size of the element.  */
1287
#define ADDR_VEC_ALIGN(ADDR_VEC) 2
1288
 
1289
/* Define this as 1 if `char' should by default be signed; else as 0.  */
1290
#define DEFAULT_SIGNED_CHAR 1
1291
 
1292
/* Max number of bytes we can move from memory to memory
1293
   in one reasonably fast instruction.  */
1294
#define MOVE_MAX 8
1295
 
1296
/* Higher than the default as we prefer to use simple move insns
1297
   (better scheduling and delay slot filling) and because our
1298
   built-in block move is really a 2X unrolled loop.
1299
 
1300
   Believe it or not, this has to be big enough to allow for copying all
1301
   arguments passed in registers to avoid infinite recursion during argument
1302
   setup for a function call.  Why?  Consider how we copy the stack slots
1303
   reserved for parameters when they may be trashed by a call.  */
1304
#define MOVE_RATIO(speed) (TARGET_64BIT ? 8 : 4)
1305
 
1306
/* Define if operations between registers always perform the operation
1307
   on the full register even if a narrower mode is specified.  */
1308
#define WORD_REGISTER_OPERATIONS
1309
 
1310
/* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1311
   will either zero-extend or sign-extend.  The value of this macro should
1312
   be the code that says which one of the two operations is implicitly
1313
   done, UNKNOWN if none.  */
1314
#define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
1315
 
1316
/* Nonzero if access to memory by bytes is slow and undesirable.  */
1317
#define SLOW_BYTE_ACCESS 1
1318
 
1319
/* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1320
   is done just by pretending it is already truncated.  */
1321
#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1322
 
1323
/* Specify the machine mode that pointers have.
1324
   After generation of rtl, the compiler makes no further distinction
1325
   between pointers and any other objects of this machine mode.  */
1326
#define Pmode word_mode
1327
 
1328
/* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1329
   return the mode to be used for the comparison.  For floating-point, CCFPmode
1330
   should be used.  CC_NOOVmode should be used when the first operand is a
1331
   PLUS, MINUS, or NEG.  CCmode should be used when no special processing is
1332
   needed.  */
1333
#define SELECT_CC_MODE(OP,X,Y) \
1334
  (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode : CCmode)    \
1335
 
1336
/* A function address in a call instruction
1337
   is a byte address (for indexing purposes)
1338
   so give the MEM rtx a byte's mode.  */
1339
#define FUNCTION_MODE SImode
1340
 
1341
/* Define this if addresses of constant functions
1342
   shouldn't be put through pseudo regs where they can be cse'd.
1343
   Desirable on machines where ordinary constants are expensive
1344
   but a CALL with constant address is cheap.  */
1345
#define NO_FUNCTION_CSE
1346
 
1347
/* Define this to be nonzero if shift instructions ignore all but the low-order
1348
   few bits.  */
1349
#define SHIFT_COUNT_TRUNCATED 1
1350
 
1351
/* Compute extra cost of moving data between one register class
1352
   and another.
1353
 
1354
   Make moves from SAR so expensive they should never happen.  We used to
1355
   have 0xffff here, but that generates overflow in rare cases.
1356
 
1357
   Copies involving a FP register and a non-FP register are relatively
1358
   expensive because they must go through memory.
1359
 
1360
   Other copies are reasonably cheap.  */
1361
#define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
1362
 (CLASS1 == SHIFT_REGS ? 0x100                                  \
1363
  : FP_REG_CLASS_P (CLASS1) && ! FP_REG_CLASS_P (CLASS2) ? 16   \
1364
  : FP_REG_CLASS_P (CLASS2) && ! FP_REG_CLASS_P (CLASS1) ? 16   \
1365
  : 2)
1366
 
1367
/* Adjust the cost of branches.  */
1368
#define BRANCH_COST(speed_p, predictable_p) (pa_cpu == PROCESSOR_8000 ? 2 : 1)
1369
 
1370
/* Handling the special cases is going to get too complicated for a macro,
1371
   just call `pa_adjust_insn_length' to do the real work.  */
1372
#define ADJUST_INSN_LENGTH(INSN, LENGTH)        \
1373
  LENGTH += pa_adjust_insn_length (INSN, LENGTH);
1374
 
1375
/* Millicode insns are actually function calls with some special
1376
   constraints on arguments and register usage.
1377
 
1378
   Millicode calls always expect their arguments in the integer argument
1379
   registers, and always return their result in %r29 (ret1).  They
1380
   are expected to clobber their arguments, %r1, %r29, and the return
1381
   pointer which is %r31 on 32-bit and %r2 on 64-bit, and nothing else.
1382
 
1383
   This macro tells reorg that the references to arguments and
1384
   millicode calls do not appear to happen until after the millicode call.
1385
   This allows reorg to put insns which set the argument registers into the
1386
   delay slot of the millicode call -- thus they act more like traditional
1387
   CALL_INSNs.
1388
 
1389
   Note we cannot consider side effects of the insn to be delayed because
1390
   the branch and link insn will clobber the return pointer.  If we happened
1391
   to use the return pointer in the delay slot of the call, then we lose.
1392
 
1393
   get_attr_type will try to recognize the given insn, so make sure to
1394
   filter out things it will not accept -- SEQUENCE, USE and CLOBBER insns
1395
   in particular.  */
1396
#define INSN_REFERENCES_ARE_DELAYED(X) (insn_refs_are_delayed (X))
1397
 
1398
 
1399
/* Control the assembler format that we output.  */
1400
 
1401
/* A C string constant describing how to begin a comment in the target
1402
   assembler language.  The compiler assumes that the comment will end at
1403
   the end of the line.  */
1404
 
1405
#define ASM_COMMENT_START ";"
1406
 
1407
/* Output to assembler file text saying following lines
1408
   may contain character constants, extra white space, comments, etc.  */
1409
 
1410
#define ASM_APP_ON ""
1411
 
1412
/* Output to assembler file text saying following lines
1413
   no longer contain unusual constructs.  */
1414
 
1415
#define ASM_APP_OFF ""
1416
 
1417
/* This is how to output the definition of a user-level label named NAME,
1418
   such as the label on a static function or variable NAME.  */
1419
 
1420
#define ASM_OUTPUT_LABEL(FILE,NAME) \
1421
  do {                                                  \
1422
    assemble_name ((FILE), (NAME));                     \
1423
    if (TARGET_GAS)                                     \
1424
      fputs (":\n", (FILE));                            \
1425
    else                                                \
1426
      fputc ('\n', (FILE));                             \
1427
  } while (0)
1428
 
1429
/* This is how to output a reference to a user-level label named NAME.
1430
   `assemble_name' uses this.  */
1431
 
1432
#define ASM_OUTPUT_LABELREF(FILE,NAME)  \
1433
  do {                                  \
1434
    const char *xname = (NAME);         \
1435
    if (FUNCTION_NAME_P (NAME))         \
1436
      xname += 1;                       \
1437
    if (xname[0] == '*')         \
1438
      xname += 1;                       \
1439
    else                                \
1440
      fputs (user_label_prefix, FILE);  \
1441
    fputs (xname, FILE);                \
1442
  } while (0)
1443
 
1444
/* This how we output the symbol_ref X.  */
1445
 
1446
#define ASM_OUTPUT_SYMBOL_REF(FILE,X) \
1447
  do {                                                 \
1448
    SYMBOL_REF_FLAGS (X) |= SYMBOL_FLAG_REFERENCED;    \
1449
    assemble_name (FILE, XSTR (X, 0));                 \
1450
  } while (0)
1451
 
1452
/* This is how to store into the string LABEL
1453
   the symbol_ref name of an internal numbered label where
1454
   PREFIX is the class of label and NUM is the number within the class.
1455
   This is suitable for output with `assemble_name'.  */
1456
 
1457
#define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM)   \
1458
  sprintf (LABEL, "*%c$%s%04ld", (PREFIX)[0], (PREFIX) + 1, (long)(NUM))
1459
 
1460
/* Output the definition of a compiler-generated label named NAME.  */
1461
 
1462
#define ASM_OUTPUT_INTERNAL_LABEL(FILE,NAME) \
1463
  do {                                                  \
1464
    assemble_name_raw ((FILE), (NAME));                 \
1465
    if (TARGET_GAS)                                     \
1466
      fputs (":\n", (FILE));                            \
1467
    else                                                \
1468
      fputc ('\n', (FILE));                             \
1469
  } while (0)
1470
 
1471
#define TARGET_ASM_GLOBALIZE_LABEL pa_globalize_label
1472
 
1473
#define ASM_OUTPUT_ASCII(FILE, P, SIZE)  \
1474
  output_ascii ((FILE), (P), (SIZE))
1475
 
1476
/* Jump tables are always placed in the text section.  Technically, it
1477
   is possible to put them in the readonly data section when -mbig-switch
1478
   is specified.  This has the benefit of getting the table out of .text
1479
   and reducing branch lengths as a result.  The downside is that an
1480
   additional insn (addil) is needed to access the table when generating
1481
   PIC code.  The address difference table also has to use 32-bit
1482
   pc-relative relocations.  Currently, GAS does not support these
1483
   relocations, although it is easily modified to do this operation.
1484
   The table entries need to look like "$L1+(.+8-$L0)-$PIC_pcrel$0"
1485
   when using ELF GAS.  A simple difference can be used when using
1486
   SOM GAS or the HP assembler.  The final downside is GDB complains
1487
   about the nesting of the label for the table when debugging.  */
1488
 
1489
#define JUMP_TABLES_IN_TEXT_SECTION 1
1490
 
1491
/* This is how to output an element of a case-vector that is absolute.  */
1492
 
1493
#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE)  \
1494
  if (TARGET_BIG_SWITCH)                                                \
1495
    fprintf (FILE, "\t.word L$%04d\n", VALUE);                          \
1496
  else                                                                  \
1497
    fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
1498
 
1499
/* This is how to output an element of a case-vector that is relative.
1500
   Since we always place jump tables in the text section, the difference
1501
   is absolute and requires no relocation.  */
1502
 
1503
#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL)  \
1504
  if (TARGET_BIG_SWITCH)                                                \
1505
    fprintf (FILE, "\t.word L$%04d-L$%04d\n", VALUE, REL);              \
1506
  else                                                                  \
1507
    fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
1508
 
1509
/* This is how to output an assembler line that says to advance the
1510
   location counter to a multiple of 2**LOG bytes.  */
1511
 
1512
#define ASM_OUTPUT_ALIGN(FILE,LOG)      \
1513
    fprintf (FILE, "\t.align %d\n", (1<<(LOG)))
1514
 
1515
#define ASM_OUTPUT_SKIP(FILE,SIZE)  \
1516
  fprintf (FILE, "\t.blockz "HOST_WIDE_INT_PRINT_UNSIGNED"\n",          \
1517
           (unsigned HOST_WIDE_INT)(SIZE))
1518
 
1519
/* This says how to output an assembler line to define an uninitialized
1520
   global variable with size SIZE (in bytes) and alignment ALIGN (in bits).
1521
   This macro exists to properly support languages like C++ which do not
1522
   have common data.  */
1523
 
1524
#define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN)           \
1525
  pa_asm_output_aligned_bss (FILE, NAME, SIZE, ALIGN)
1526
 
1527
/* This says how to output an assembler line to define a global common symbol
1528
   with size SIZE (in bytes) and alignment ALIGN (in bits).  */
1529
 
1530
#define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN)              \
1531
  pa_asm_output_aligned_common (FILE, NAME, SIZE, ALIGN)
1532
 
1533
/* This says how to output an assembler line to define a local common symbol
1534
   with size SIZE (in bytes) and alignment ALIGN (in bits).  This macro
1535
   controls how the assembler definitions of uninitialized static variables
1536
   are output.  */
1537
 
1538
#define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGN)               \
1539
  pa_asm_output_aligned_local (FILE, NAME, SIZE, ALIGN)
1540
 
1541
/* All HP assemblers use "!" to separate logical lines.  */
1542
#define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == '!')
1543
 
1544
#define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
1545
  ((CHAR) == '@' || (CHAR) == '#' || (CHAR) == '*' || (CHAR) == '^')
1546
 
1547
/* Print operand X (an rtx) in assembler syntax to file FILE.
1548
   CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1549
   For `%' followed by punctuation, CODE is the punctuation and X is null.
1550
 
1551
   On the HP-PA, the CODE can be `r', meaning this is a register-only operand
1552
   and an immediate zero should be represented as `r0'.
1553
 
1554
   Several % codes are defined:
1555
   O an operation
1556
   C compare conditions
1557
   N extract conditions
1558
   M modifier to handle preincrement addressing for memory refs.
1559
   F modifier to handle preincrement addressing for fp memory refs */
1560
 
1561
#define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1562
 
1563
 
1564
/* Print a memory address as an operand to reference that memory location.  */
1565
 
1566
#define PRINT_OPERAND_ADDRESS(FILE, ADDR)  \
1567
{ rtx addr = ADDR;                                                      \
1568
  switch (GET_CODE (addr))                                              \
1569
    {                                                                   \
1570
    case REG:                                                           \
1571
      fprintf (FILE, "0(%s)", reg_names [REGNO (addr)]);                \
1572
      break;                                                            \
1573
    case PLUS:                                                          \
1574
      gcc_assert (GET_CODE (XEXP (addr, 1)) == CONST_INT);              \
1575
      fprintf (FILE, "%d(%s)", (int)INTVAL (XEXP (addr, 1)),            \
1576
               reg_names [REGNO (XEXP (addr, 0))]);                      \
1577
      break;                                                            \
1578
    case LO_SUM:                                                        \
1579
      if (!symbolic_operand (XEXP (addr, 1), VOIDmode))                 \
1580
        fputs ("R'", FILE);                                             \
1581
      else if (flag_pic == 0)                                            \
1582
        fputs ("RR'", FILE);                                            \
1583
      else                                                              \
1584
        fputs ("RT'", FILE);                                            \
1585
      output_global_address (FILE, XEXP (addr, 1), 0);                   \
1586
      fputs ("(", FILE);                                                \
1587
      output_operand (XEXP (addr, 0), 0);                         \
1588
      fputs (")", FILE);                                                \
1589
      break;                                                            \
1590
    case CONST_INT:                                                     \
1591
      fprintf (FILE, HOST_WIDE_INT_PRINT_DEC "(%%r0)", INTVAL (addr));  \
1592
      break;                                                            \
1593
    default:                                                            \
1594
      output_addr_const (FILE, addr);                                   \
1595
    }}
1596
 
1597
 
1598
/* Find the return address associated with the frame given by
1599
   FRAMEADDR.  */
1600
#define RETURN_ADDR_RTX(COUNT, FRAMEADDR)                                \
1601
  (return_addr_rtx (COUNT, FRAMEADDR))
1602
 
1603
/* Used to mask out junk bits from the return address, such as
1604
   processor state, interrupt status, condition codes and the like.  */
1605
#define MASK_RETURN_ADDR                                                \
1606
  /* The privilege level is in the two low order bits, mask em out      \
1607
     of the return address.  */                                         \
1608
  (GEN_INT (-4))
1609
 
1610
/* The number of Pmode words for the setjmp buffer.  */
1611
#define JMP_BUF_SIZE 50
1612
 
1613
/* We need a libcall to canonicalize function pointers on TARGET_ELF32.  */
1614
#define CANONICALIZE_FUNCPTR_FOR_COMPARE_LIBCALL \
1615
  "__canonicalize_funcptr_for_compare"
1616
 
1617
#ifdef HAVE_AS_TLS
1618
#undef TARGET_HAVE_TLS
1619
#define TARGET_HAVE_TLS true
1620
#endif

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