URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [tags/] [gnu-src/] [gcc-4.5.1/] [gcc-4.5.1-or32-1.0rc2/] [gcc/] [testsuite/] [g++.dg/] [ext/] [altivec-5.C] - Blame information for rev 384

Details | Compare with Previous | View Log


/* { dg-do compile { target powerpc*-*-* } } */
/* { dg-require-effective-target powerpc_altivec_ok } */
/* { dg-options "-maltivec" } */
 
/* PR c++/14426 */
 
#include 
 
vector unsigned int splat0u()
{
    return vec_splat_u32(0);
}
vector int splat0s()
{
    return vec_splat_s32(0);
}

Line No.	Rev	Author	Line
1	301	jeremybenn	`/* { dg-do compile { target powerpc--* } } */`
2			`/* { dg-require-effective-target powerpc_altivec_ok } */`
3			`/* { dg-options "-maltivec" } */`
4
5			`/* PR c++/14426 */`
6
7			`#include`
8
9			`vector unsigned int splat0u()`
10			`{`
11			`return vec_splat_u32(0);`
12			`}`
13			`vector int splat0s()`
14			`{`
15			`return vec_splat_s32(0);`
16			`}`

Browse

Tools

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [tags/] [gnu-src/] [gcc-4.5.1/] [gcc-4.5.1-or32-1.0rc2/] [gcc/] [testsuite/] [g++.dg/] [ext/] [altivec-5.C] - Blame information for rev 384