URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [tags/] [gnu-src/] [gcc-4.5.1/] [gcc-4.5.1-or32-1.0rc2/] [gcc/] [testsuite/] [gcc.target/] [arm/] [ctz.c] - Blame information for rev 384

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/* { dg-do compile } */
/* { dg-require-effective-target arm32 } */
/* { dg-options "-O2 -march=armv6t2" } */
 
unsigned int functest(unsigned int x)
{
        return __builtin_ctz(x);
}
 
/* { dg-final { scan-assembler "rbit" } } */
/* { dg-final { scan-assembler "clz" } } */
/* { dg-final { scan-assembler-not "rsb" } } */

Line No.	Rev	Author	Line
1	313	jeremybenn	`/* { dg-do compile } */`
2			`/* { dg-require-effective-target arm32 } */`
3			`/* { dg-options "-O2 -march=armv6t2" } */`
4
5			`unsigned int functest(unsigned int x)`
6			`{`
7			`return __builtin_ctz(x);`
8			`}`
9
10			`/* { dg-final { scan-assembler "rbit" } } */`
11			`/* { dg-final { scan-assembler "clz" } } */`
12			`/* { dg-final { scan-assembler-not "rsb" } } */`

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Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [tags/] [gnu-src/] [gcc-4.5.1/] [gcc-4.5.1-or32-1.0rc2/] [gcc/] [testsuite/] [gcc.target/] [arm/] [ctz.c] - Blame information for rev 384