OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [tags/] [gnu-src/] [gcc-4.5.1/] [gcc-4.5.1-or32-1.0rc2/] [gcc/] [testsuite/] [gcc.target/] [i386/] [cmov1.c] - Blame information for rev 384

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 318 jeremybenn
/* { dg-do compile } */
2
/* This test checks for absolute memory operands.  */
3
/* { dg-require-effective-target nonpic } */
4
/* { dg-options "-O2 -march=k8" } */
5
/* { dg-final { scan-assembler "sar\[^\\n\]*magic_namea" } } */
6
/* { dg-final { scan-assembler "sar\[^\\n\]*magic_nameb" } } */
7
/* { dg-final { scan-assembler "sar\[^\\n\]*magic_namec" } } */
8
/* { dg-final { scan-assembler "shr\[^\\n\]*magic_named" } } */
9
/* { dg-final { scan-assembler "shr\[^\\n\]*magic_namee" } } */
10
/* { dg-final { scan-assembler "shr\[^\\n\]*magic_namef" } } */
11
 
12
/* Check code generation for several conditional moves doable by single arithmetics.  */
13
 
14
static int magic_namea;
15
static char magic_nameb;
16
static short magic_namec;
17
static int magic_named;
18
static char magic_namee;
19
static short magic_namef;
20
 
21
unsigned int gen;
22
void m(void)
23
{
24
  magic_namec=magic_namec>=0?0:-1;
25
  magic_namea=magic_namea>=0?0:-1;
26
  magic_nameb=magic_nameb>=0?0:-1;
27
  magic_named=magic_named>=0?0:1;
28
  magic_namee=magic_namee>=0?0:1;
29
  magic_namef=magic_namef>=0?0:1;
30
}
31
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.