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Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [tags/] [gnu-src/] [gcc-4.5.1/] [gcc-4.5.1-or32-1.0rc2/] [gcc/] [testsuite/] [gcc.target/] [i386/] [i386.exp] - Blame information for rev 384

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Line No. Rev Author Line
1 318 jeremybenn 
# Copyright (C) 1997, 2004, 2007, 2008, 2009, 2010
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# Free Software Foundation, Inc.
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; either version 3 of the License, or
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# (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with GCC; see the file COPYING3.  If not see
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# .
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# GCC testsuite that uses the `dg.exp' driver.
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# Exit immediately if this isn't a x86 target.
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if { ![istarget i?86*-*-*] && ![istarget x86_64-*-*] } then {
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  return
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}
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25 
# Load support procs.
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load_lib gcc-dg.exp
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# Return 1 if attribute ms_hook_prologue is supported.
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proc check_effective_target_ms_hook_prologue { } {
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    if { [check_effective_target_ilp32]
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         && [check_no_compiler_messages ms_hook_prologue object {
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             void __attribute__ ((__ms_hook_prologue__)) foo ();
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         } ""] } {
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        return 1
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    } else {
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        return 0
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    }
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}
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# Return 1 if 3dnow instructions can be compiled.
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proc check_effective_target_3dnow { } {
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    return [check_no_compiler_messages 3dnow object {
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        void _m_pfadd (void)
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        {
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            __builtin_ia32_pfadd();
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        }
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    } "-O2 -m3dnow" ]
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}
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# Return 1 if sse3 instructions can be compiled.
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proc check_effective_target_sse3 { } {
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    return [check_no_compiler_messages sse3 object {
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        typedef double __m128d __attribute__ ((__vector_size__ (16)));
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        typedef double __v2df __attribute__ ((__vector_size__ (16)));
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        __m128d _mm_addsub_pd (__m128d __X, __m128d __Y)
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        {
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            return (__m128d) __builtin_ia32_addsubpd ((__v2df)__X, (__v2df)__Y);
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        }
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    } "-O2 -msse3" ]
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}
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# Return 1 if ssse3 instructions can be compiled.
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proc check_effective_target_ssse3 { } {
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    return [check_no_compiler_messages ssse3 object {
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        typedef long long __m128i __attribute__ ((__vector_size__ (16)));
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        typedef int __v4si __attribute__ ((__vector_size__ (16)));
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        __m128i _mm_abs_epi32 (__m128i __X)
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        {
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            return (__m128i) __builtin_ia32_pabsd128 ((__v4si)__X);
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        }
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    } "-O2 -mssse3" ]
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}
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# Return 1 if sse4 instructions can be compiled.
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proc check_effective_target_sse4 { } {
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    return [check_no_compiler_messages sse4.1 object {
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        typedef long long __m128i __attribute__ ((__vector_size__ (16)));
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        typedef int __v4si __attribute__ ((__vector_size__ (16)));
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        __m128i _mm_mullo_epi32 (__m128i __X, __m128i __Y)
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        {
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            return (__m128i) __builtin_ia32_pmulld128 ((__v4si)__X,
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                                                       (__v4si)__Y);
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        }
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    } "-O2 -msse4.1" ]
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}
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# Return 1 if aes instructions can be compiled.
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proc check_effective_target_aes { } {
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    return [check_no_compiler_messages aes object {
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        typedef long long __m128i __attribute__ ((__vector_size__ (16)));
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        typedef long long __v2di __attribute__ ((__vector_size__ (16)));
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        __m128i _mm_aesimc_si128 (__m128i __X)
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        {
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            return (__m128i) __builtin_ia32_aesimc128 ((__v2di)__X);
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        }
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    } "-O2 -maes" ]
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}
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# Return 1 if vaes instructions can be compiled.
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proc check_effective_target_vaes { } {
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    return [check_no_compiler_messages vaes object {
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        typedef long long __m128i __attribute__ ((__vector_size__ (16)));
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        typedef long long __v2di __attribute__ ((__vector_size__ (16)));
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        __m128i _mm_aesimc_si128 (__m128i __X)
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        {
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            return (__m128i) __builtin_ia32_aesimc128 ((__v2di)__X);
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        }
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    } "-O2 -maes -mavx" ]
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}
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# Return 1 if pclmul instructions can be compiled.
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proc check_effective_target_pclmul { } {
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    return [check_no_compiler_messages pclmul object {
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        typedef long long __m128i __attribute__ ((__vector_size__ (16)));
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        typedef long long __v2di __attribute__ ((__vector_size__ (16)));
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        __m128i pclmulqdq_test (__m128i __X, __m128i __Y)
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        {
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            return (__m128i) __builtin_ia32_pclmulqdq128 ((__v2di)__X,
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                                                          (__v2di)__Y,
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                                                          1);
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        }
128 
    } "-O2 -mpclmul" ]
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}
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# Return 1 if vpclmul instructions can be compiled.
132 
proc check_effective_target_vpclmul { } {
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    return [check_no_compiler_messages vpclmul object {
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        typedef long long __m128i __attribute__ ((__vector_size__ (16)));
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        typedef long long __v2di __attribute__ ((__vector_size__ (16)));
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        __m128i pclmulqdq_test (__m128i __X, __m128i __Y)
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        {
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            return (__m128i) __builtin_ia32_pclmulqdq128 ((__v2di)__X,
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                                                          (__v2di)__Y,
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                                                          1);
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        }
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    } "-O2 -mpclmul -mavx" ]
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}
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# Return 1 if sse4a instructions can be compiled.
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proc check_effective_target_sse4a { } {
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    return [check_no_compiler_messages sse4a object {
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        typedef long long __m128i __attribute__ ((__vector_size__ (16)));
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        typedef long long __v2di __attribute__ ((__vector_size__ (16)));
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152 
        __m128i _mm_insert_si64 (__m128i __X,__m128i __Y)
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        {
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            return (__m128i) __builtin_ia32_insertq ((__v2di)__X, (__v2di)__Y);
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        }
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    } "-O2 -msse4a" ]
157 
}
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# Return 1 if fma4 instructions can be compiled.
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proc check_effective_target_fma4 { } {
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    return [check_no_compiler_messages fma4 object {
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        typedef float __m128 __attribute__ ((__vector_size__ (16)));
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        typedef float __v4sf __attribute__ ((__vector_size__ (16)));
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        __m128 _mm_macc_ps(__m128 __A, __m128 __B, __m128 __C)
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        {
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            return (__m128) __builtin_ia32_vfmaddps ((__v4sf)__A,
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                                                     (__v4sf)__B,
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                                                     (__v4sf)__C);
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        }
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    } "-O2 -mfma4" ]
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}
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# Return 1 if xop instructions can be compiled.
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proc check_effective_target_xop { } {
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    return [check_no_compiler_messages xop object {
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        typedef long long __m128i __attribute__ ((__vector_size__ (16), __may_alias__));
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        typedef short __v8hi __attribute__ ((__vector_size__ (16)));
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        __m128i _mm_maccs_epi16(__m128i __A, __m128i __B, __m128i __C)
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        {
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            return (__m128i) __builtin_ia32_vpmacssww ((__v8hi)__A,
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                                                       (__v8hi)__B,
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                                                       (__v8hi)__C);
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        }
184 
    } "-O2 -mxop" ]
185 
}
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# If the linker used understands -M , pass it to clear hardware
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# capabilities set by the Sun assembler.
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set FLAGS ""
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set clearcap_ldflags "-Wl,-M,$srcdir/$subdir/clearcap.map"
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if [check_no_compiler_messages mapfile executable {
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        int main (void) { return 0; }
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  } $clearcap_ldflags ] {
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  set FLAGS $clearcap_ldflags
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}
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# If a testcase doesn't have special options, use these.
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global DEFAULT_CFLAGS
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if ![info exists DEFAULT_CFLAGS] then {
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    set DEFAULT_CFLAGS " -ansi -pedantic-errors"
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}
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# Initialize `dg'.
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dg-init
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# Special case compilation of vect-args.c so we don't have to
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# replicate it 10 times.
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foreach type { "" -mmmx -m3dnow -msse -msse2 } {
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  foreach level { "" -O } {
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    set flags "$type $level"
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    verbose -log "Testing vect-args, $flags" 1
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    dg-test $srcdir/$subdir/vect-args.c $flags ""
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  }
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}
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# Everything else.
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set tests [lsort [glob -nocomplain $srcdir/$subdir/*.\[cS\]]]
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set tests [prune $tests $srcdir/$subdir/vect-args.c]
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# Main loop.
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dg-runtest $tests $FLAGS $DEFAULT_CFLAGS
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# All done.
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dg-finish

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