URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [tags/] [gnu-src/] [gcc-4.5.1/] [gcc-4.5.1-or32-1.0rc2/] [gcc/] [testsuite/] [gcc.target/] [i386/] [pr22362.c] - Blame information for rev 384

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/* PR target/22362 */
/* { dg-do compile } */
/* { dg-options "-O2" } */
/* { dg-require-effective-target ilp32 } */
 
register unsigned int reg0 __asm__ ("esi");
register unsigned int reg1 __asm__ ("edi");
register unsigned int reg2 __asm__ ("ebx");
 
static unsigned int
__attribute__((noinline))
foo (unsigned long *x, void *y, void *z)
{
  int i;
 
  for (i = 5; i > 0; i--)
    x[i] = (unsigned long) foo ((unsigned long *) x[i], y, z);
  return 0;
}
 
unsigned int
bar (void)
{
  return foo (0, 0, 0);
}

Line No.	Rev	Author	Line
1	318	jeremybenn	`/* PR target/22362 */`
2			`/* { dg-do compile } */`
3			`/* { dg-options "-O2" } */`
4			`/* { dg-require-effective-target ilp32 } */`
5
6			`register unsigned int reg0 __asm__ ("esi");`
7			`register unsigned int reg1 __asm__ ("edi");`
8			`register unsigned int reg2 __asm__ ("ebx");`
9
10			`static unsigned int`
11			`__attribute__((noinline))`
12			`foo (unsigned long x, void y, void *z)`
13			`{`
14			`int i;`
15
16			`for (i = 5; i > 0; i--)`
17			`x[i] = (unsigned long) foo ((unsigned long *) x[i], y, z);`
18			`return 0;`
19			`}`
20
21			`unsigned int`
22			`bar (void)`
23			`{`
24			`return foo (0, 0, 0);`
25			`}`

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Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [tags/] [gnu-src/] [gcc-4.5.1/] [gcc-4.5.1-or32-1.0rc2/] [gcc/] [testsuite/] [gcc.target/] [i386/] [pr22362.c] - Blame information for rev 384