OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [tags/] [gnu-src/] [gcc-4.5.1/] [gcc-4.5.1-or32-1.0rc2/] [gcc/] [testsuite/] [gcc.target/] [i386/] [pr36786.c] - Blame information for rev 384

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 318 jeremybenn
/* { dg-do compile } */
2
/* { dg-require-effective-target lp64 } */
3
 
4
typedef int DItype __attribute__ ((mode (DI)));
5
typedef unsigned int UDItype __attribute__ ((mode (DI)));
6
typedef int TItype __attribute__ ((mode (TI)));
7
 
8
__floattisf (TItype u)
9
{
10
  DItype hi = u >> (8 * 8);
11
  UDItype count, shift;
12
  hi = u >> shift;
13
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.