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Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [tags/] [gnu-src/] [gcc-4.5.1/] [gcc-4.5.1-or32-1.0rc2/] [gcc/] [testsuite/] [gcc.target/] [powerpc/] [20050603-3.c] - Blame information for rev 384

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/* { dg-do compile { target { ilp32 } } } */
/* { dg-options "-O2" } */
struct Q
{
  long x:20;
  long y:4;
  long z:8;
}b;
/* This should generate a single rl[w]imi. */
void rotins (unsigned int x)
{
  b.y = (x<<12) | (x>>20);
}
 
/* { dg-final { scan-assembler-not "inm" } } */

Line No.	Rev	Author	Line
1	322	jeremybenn	`/* { dg-do compile { target { ilp32 } } } */`
2			`/* { dg-options "-O2" } */`
3			`struct Q`
4			`{`
5			`long x:20;`
6			`long y:4;`
7			`long z:8;`
8			`}b;`
9			`/* This should generate a single rl[w]imi. */`
10			`void rotins (unsigned int x)`
11			`{`
12			`b.y = (x<<12) \| (x>>20);`
13			`}`
14
15			`/* { dg-final { scan-assembler-not "inm" } } */`

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[/] [openrisc/] [tags/] [gnu-src/] [gcc-4.5.1/] [gcc-4.5.1-or32-1.0rc2/] [gcc/] [testsuite/] [gcc.target/] [powerpc/] [20050603-3.c] - Blame information for rev 384