OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [tags/] [gnu-src/] [gcc-4.5.1/] [gcc-4.5.1-or32-1.0rc4/] [gcc/] [testsuite/] [gcc.target/] [powerpc/] [altivec-28.c] - Blame information for rev 322

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 322 jeremybenn
/* { dg-do compile { target powerpc*-*-* } } */
2
/* { dg-require-effective-target powerpc_altivec_ok } */
3
/* { dg-options "-maltivec" } */
4
 
5
#define B bool
6
#define P pixel
7
#define I int
8
#define BI bool int
9
#define PI pixel int
10
 
11
vector B int i;
12
vector P int j;
13
vector B I k;
14
vector P I l;
15
vector BI m;
16
vector PI n;

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.