OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [tags/] [gnu-src/] [gdb-6.8/] [pre-binutils-2.20.1-sync/] [gdb/] [config/] [i386/] [nm-go32.h] - Blame information for rev 779

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 24 jeremybenn
/* Native definitions for Intel x86 running DJGPP.
2
   Copyright 1997, 1998, 1999, 2001, 2002, 2007, 2008
3
   Free Software Foundation, Inc.
4
 
5
   This file is part of GDB.
6
 
7
   This program is free software; you can redistribute it and/or modify
8
   it under the terms of the GNU General Public License as published by
9
   the Free Software Foundation; either version 3 of the License, or
10
   (at your option) any later version.
11
 
12
   This program is distributed in the hope that it will be useful,
13
   but WITHOUT ANY WARRANTY; without even the implied warranty of
14
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15
   GNU General Public License for more details.
16
 
17
   You should have received a copy of the GNU General Public License
18
   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
19
 
20
#define I386_USE_GENERIC_WATCHPOINTS
21
 
22
#include "i386/nm-i386.h"
23
 
24
/* Support for hardware-assisted breakpoints and watchpoints.  */
25
 
26
#define I386_DR_LOW_SET_CONTROL(VAL)    go32_set_dr7 (VAL)
27
extern void go32_set_dr7 (unsigned);
28
 
29
#define I386_DR_LOW_SET_ADDR(N,ADDR)    go32_set_dr (N,ADDR)
30
extern void go32_set_dr (int, CORE_ADDR);
31
 
32
#define I386_DR_LOW_RESET_ADDR(N)
33
 
34
#define I386_DR_LOW_GET_STATUS()        go32_get_dr6 ()
35
extern unsigned go32_get_dr6 (void);

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.