OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [tags/] [gnu-src/] [gdb-6.8/] [pre-binutils-2.20.1-sync/] [gdb/] [testsuite/] [gdb.xml/] [tdesc-regs.exp] - Blame information for rev 291

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 24 jeremybenn
# Copyright 2007, 2008 Free Software Foundation, Inc.
2
 
3
# This program is free software; you can redistribute it and/or modify
4
# it under the terms of the GNU General Public License as published by
5
# the Free Software Foundation; either version 3 of the License, or
6
# (at your option) any later version.
7
#
8
# This program is distributed in the hope that it will be useful,
9
# but WITHOUT ANY WARRANTY; without even the implied warranty of
10
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
11
# GNU General Public License for more details.
12
#
13
# You should have received a copy of the GNU General Public License
14
# along with this program.  If not, see .
15
 
16
if {[gdb_skip_xml_test]} {
17
    unsupported "tdesc-regs.exp"
18
    return -1
19
}
20
 
21
gdb_start
22
 
23
# To test adding registers, we need a core set of registers for this
24
# architecture, or the description will be rejected.
25
 
26
set core-regs ""
27
set regdir ""
28
switch -glob -- [istarget] {
29
    "*arm-*-*" {
30
        set core-regs {arm-core.xml}
31
    }
32
    "xscale-*-*" {
33
        set core-regs {arm-core.xml}
34
    }
35
    "mips*-*-*" {
36
        set core-regs {mips-cpu.xml mips-cp0.xml mips-fpu.xml}
37
    }
38
    "powerpc*-*-*" {
39
        set regdir "rs6000/"
40
        set core-regs {power-core.xml}
41
    }
42
}
43
 
44
# If no core registers were specified, assume this target does not
45
# support target-defined registers.  Verify that we get a warning if
46
# we try to use them.  This not only tests the warning, but also
47
# reminds maintainers to add test support when they add the feature.
48
if {[string equal ${core-regs} ""]} {
49
    gdb_test "set tdesc file $srcdir/$subdir/single-reg.xml" \
50
        "warning: Target-supplied registers are not supported.*" \
51
        "set tdesc file single-reg.xml"
52
    unsupported "register tests"
53
    return 0
54
}
55
 
56
# Otherwise, we support both XML and target defined registers.
57
 
58
# Make sure we reject a description missing standard registers,
59
# like the PC.
60
gdb_test "set tdesc file $srcdir/$subdir/single-reg.xml" \
61
    "warning: Architecture rejected target-supplied description" \
62
    "set tdesc file single-reg.xml"
63
 
64
# Copy the core registers into the objdir if necessary, so that they
65
# will be found by .
66
foreach src ${core-regs} {
67
    file delete "$src"
68
    file copy "$srcdir/../features/$regdir$src" "$src"
69
}
70
 
71
# Similarly, we need to copy files under test into the objdir.
72
proc load_description { file errmsg } {
73
    global srcdir
74
    global subdir
75
    global gdb_prompt
76
    global core-regs
77
 
78
    file delete "regs.xml"
79
    set ifd [open "$srcdir/$subdir/$file" r]
80
    set ofd [open "regs.xml" w]
81
    while {[gets $ifd line] >= 0} {
82
        if {[regexp {} $line]} {
83
            foreach src ${core-regs} {
84
                puts $ofd "  "
85
            }
86
        } else {
87
            puts $ofd $line
88
        }
89
    }
90
    close $ifd
91
    close $ofd
92
 
93
    # Anchor the test output, so that error messages are detected.
94
    set cmd "set tdesc filename regs.xml"
95
    set msg "set tdesc filename $file"
96
    set cmd_regex [string_to_regexp $cmd]
97
    gdb_test_multiple $cmd $msg {
98
        -re "^$cmd_regex\r\n$errmsg$gdb_prompt $" {
99
            pass $msg
100
        }
101
    }
102
}
103
 
104
load_description "extra-regs.xml" ""
105
gdb_test "ptype \$extrareg" "type = (int|long|long long)"
106
gdb_test "ptype \$uintreg" "type = uint32_t"
107
gdb_test "ptype \$vecreg" "type = int8_t \\\[4\\\]"
108
gdb_test "ptype \$unionreg" \
109
    "type = union {\r\n *v4int8 v4;\r\n *v2int16 v2;\r\n}"
110
gdb_test "ptype \$unionreg.v4" "type = int8_t \\\[4\\\]"
111
 
112
load_description "core-only.xml" ""
113
# The extra register from the previous description should be gone.
114
gdb_test "ptype \$extrareg" "type = void"
115
 
116
foreach src ${core-regs} {
117
    file delete "$src"
118
}
119
file delete "regs.xml"

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.