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[/] [openrisc/] [tags/] [gnu-src/] [gdb-6.8/] [pre-binutils-2.20.1-sync/] [sim/] [testsuite/] [sim/] [arm/] [adc.cgs] - Blame information for rev 338

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Line No. Rev Author Line
1 24 jeremybenn
# arm testcase for adc
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# mach: all
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# ??? Unfinished, more tests needed.
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        .include "testutils.inc"
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        start
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# adc$cond${set-cc?} $rd,$rn,$imm12
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        .global adc_imm
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adc_imm:
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        mvi_h_gr r4,1
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        mvi_h_cnvz 0,0,0,0
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        adc r5,r4,#1
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        test_h_cnvz 0,0,0,0
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        test_h_gr r5,2
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# adc$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftimm}
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        .global adc_reg_imm_shift
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adc_reg_imm_shift:
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        mvi_h_gr r4,1
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        mvi_h_gr r5,1
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        mvi_h_cnvz 0,0,0,0
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        adc r6,r4,r5,lsl #2
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        test_h_cnvz 0,0,0,0
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        test_h_gr r6,5
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# adc$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftreg}
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        .global adc_reg_reg_shift
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adc_reg_reg_shift:
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        mvi_h_gr r4,1
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        mvi_h_gr r5,1
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        mvi_h_gr r6,2
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        mvi_h_cnvz 0,0,0,0
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        adc r7,r4,r5,lsl r6
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        test_h_cnvz 0,0,0,0
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        test_h_gr r7,5
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        pass

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