URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [tags/] [gnu-src/] [gdb-6.8/] [pre-binutils-2.20.1-sync/] [sim/] [testsuite/] [sim/] [sh/] [shlr8.s] - Blame information for rev 223

Details | Compare with Previous | View Log


# sh testcase for shlr8
# mach: all
# as(sh):       -defsym sim_cpu=0
# as(shdsp):    -defsym sim_cpu=1 -dsp
 
        .include "testutils.inc"
 
        start
 
shrl8:
        set_grs_a5a5
        shlr8 r0
        assertreg0 0xa5a5a5
        shlr8 r0
        assertreg0 0xa5a5
        shlr8 r0
        assertreg0 0xa5
        shlr8 r0
        assertreg0 0x0
 
        set_greg 0xa5a5a5a5, r0
        test_grs_a5a5
        pass
        exit 0

Line No.	Rev	Author	Line
1	24	jeremybenn	`# sh testcase for shlr8`
2			`# mach: all`
3			`# as(sh): -defsym sim_cpu=0`
4			`# as(shdsp): -defsym sim_cpu=1 -dsp`
5
6			`.include "testutils.inc"`
7
8			`start`
9
10			`shrl8:`
11			`set_grs_a5a5`
12			`shlr8 r0`
13			`assertreg0 0xa5a5a5`
14			`shlr8 r0`
15			`assertreg0 0xa5a5`
16			`shlr8 r0`
17			`assertreg0 0xa5`
18			`shlr8 r0`
19			`assertreg0 0x0`
20
21			`set_greg 0xa5a5a5a5, r0`
22			`test_grs_a5a5`
23			`pass`
24			`exit 0`

Browse

Tools

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [tags/] [gnu-src/] [gdb-6.8/] [pre-binutils-2.20.1-sync/] [sim/] [testsuite/] [sim/] [sh/] [shlr8.s] - Blame information for rev 223