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Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [tags/] [gnu-src/] [gdb-7.2/] [gdb-7.2-or32-1.0rc1/] [sim/] [or32/] [ChangeLog] - Blame information for rev 341

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Line No. Rev Author Line
1 330 jeremybenn
2010-09-01  Jeremy Bennett  
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        * wrapper.c (sim_write). Buffer changed to const char.
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2010-08-19  Jeremy Bennett  
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        * wrapper.c: OR32_SIM_DEBUG added to control debug messages.
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        (sim_close, sim_load, sim_create_inferior, sim_fetch_register)
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        (sim_stop): Debug statement added.
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        (sim_read, sim_write): Debug statements now controlled by
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        OR32_SIM_DEBUG.
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        (sim_store_register, sim_resume): Debug statement added and
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        existing debug statements now controlled by OR32_SIM_DEBUG.
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2010-08-15  Jeremy Bennett  
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        * wrapper.c (sim_open): Assign result of or1ksim_init correctly.
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        (sim_fetch_register): Return correct length on success.
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2010-08-04  Jeremy Bennett  
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        * wrapper.c (sim_resume): Only set the NPC back on a true
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        breakpoint, not a single step. Clear the single step flag if NOT
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        stepping before unstalling.
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2010-07-20  Jeremy Bennett  
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        * configure: Regenerated.
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        * Makefile.in: Added LIBS.
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2010-06-30  Jeremy Bennett  
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        * config.in: Generated.
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        * configure: Generated.
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        * configure.ac: Created.
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        * Makefile.in: Created.
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        * or32sim.h: Created.
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        * README: Created.
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        * tconfig.in: Created.
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        * wrapper.c: Created.

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