| 1 |
207 |
jeremybenn |
/*
|
| 2 |
|
|
* The authors hereby grant permission to use, copy, modify, distribute,
|
| 3 |
|
|
* and license this software and its documentation for any purpose, provided
|
| 4 |
|
|
* that existing copyright notices are retained in all copies and that this
|
| 5 |
|
|
* notice is included verbatim in any distributions. No written agreement,
|
| 6 |
|
|
* license, or royalty fee is required for any of the authorized uses.
|
| 7 |
|
|
* Modifications to this software may be copyrighted by their authors
|
| 8 |
|
|
* and need not follow the licensing terms described here, provided that
|
| 9 |
|
|
* the new terms are clearly indicated on the first page of each file where
|
| 10 |
|
|
* they apply.
|
| 11 |
|
|
*/
|
| 12 |
|
|
|
| 13 |
|
|
/*
|
| 14 |
|
|
** cdefBF51x_base.h
|
| 15 |
|
|
**
|
| 16 |
|
|
** Copyright (C) 2009 Analog Devices, Inc.
|
| 17 |
|
|
**
|
| 18 |
|
|
************************************************************************************
|
| 19 |
|
|
**
|
| 20 |
|
|
** This include file contains a list of macro "defines" to enable the programmer
|
| 21 |
|
|
** to use symbolic names for the registers common to the ADSP-BF51x peripherals.
|
| 22 |
|
|
**
|
| 23 |
|
|
***************************************************************/
|
| 24 |
|
|
|
| 25 |
|
|
#ifndef _CDEF_BF51X_H
|
| 26 |
|
|
#define _CDEF_BF51X_H
|
| 27 |
|
|
|
| 28 |
|
|
#include <defBF51x_base.h>
|
| 29 |
|
|
|
| 30 |
|
|
#ifdef _MISRA_RULES
|
| 31 |
|
|
#pragma diag(push)
|
| 32 |
|
|
#pragma diag(suppress:misra_rule_19_4:"some macro definitions not MISRA compliant")
|
| 33 |
|
|
#endif /* _MISRA_RULES */
|
| 34 |
|
|
|
| 35 |
|
|
#ifndef _PTR_TO_VOL_VOID_PTR
|
| 36 |
|
|
#ifndef _USE_LEGACY_CDEF_BEHAVIOUR
|
| 37 |
|
|
#define _PTR_TO_VOL_VOID_PTR (void * volatile *)
|
| 38 |
|
|
#else
|
| 39 |
|
|
#define _PTR_TO_VOL_VOID_PTR (volatile void **)
|
| 40 |
|
|
#endif
|
| 41 |
|
|
#endif
|
| 42 |
|
|
|
| 43 |
|
|
|
| 44 |
|
|
/* Clock and System Control (0xFFC00000 - 0xFFC000FF) */
|
| 45 |
|
|
#define pPLL_CTL ((volatile unsigned short *)PLL_CTL)
|
| 46 |
|
|
#define pPLL_DIV ((volatile unsigned short *)PLL_DIV)
|
| 47 |
|
|
#define pVR_CTL ((volatile unsigned short *)VR_CTL)
|
| 48 |
|
|
#define pPLL_STAT ((volatile unsigned short *)PLL_STAT)
|
| 49 |
|
|
#define pPLL_LOCKCNT ((volatile unsigned short *)PLL_LOCKCNT)
|
| 50 |
|
|
#define pCHIPID ((volatile unsigned long *)CHIPID)
|
| 51 |
|
|
|
| 52 |
|
|
|
| 53 |
|
|
/* System Interrupt Controller(0xFFC00100 - 0xFFC001FF) */
|
| 54 |
|
|
#define pSWRST ((volatile unsigned short *)SWRST)
|
| 55 |
|
|
#define pSYSCR ((volatile unsigned short *)SYSCR)
|
| 56 |
|
|
|
| 57 |
|
|
#define pSIC_IMASK0 ((volatile unsigned long *)SIC_IMASK0) /* legacy register name (below) provided for backwards code compatibility */
|
| 58 |
|
|
#define pSIC_IMASK ((volatile unsigned long *)SIC_IMASK0)
|
| 59 |
|
|
#define pSIC_IAR0 ((volatile unsigned long *)SIC_IAR0)
|
| 60 |
|
|
#define pSIC_IAR1 ((volatile unsigned long *)SIC_IAR1)
|
| 61 |
|
|
#define pSIC_IAR2 ((volatile unsigned long *)SIC_IAR2)
|
| 62 |
|
|
#define pSIC_IAR3 ((volatile unsigned long *)SIC_IAR3)
|
| 63 |
|
|
#define pSIC_ISR0 ((volatile unsigned long *)SIC_ISR0) /* legacy register name (below) provided for backwards code compatibility */
|
| 64 |
|
|
#define pSIC_ISR ((volatile unsigned long *)SIC_ISR0)
|
| 65 |
|
|
#define pSIC_IWR0 ((volatile unsigned long *)SIC_IWR0) /* legacy register name (below) provided for backwards code compatibility */
|
| 66 |
|
|
#define pSIC_IWR ((volatile unsigned long *)SIC_IWR0)
|
| 67 |
|
|
|
| 68 |
|
|
/* SIC Additions to ADSP-BF51x(0xFFC0014C - 0xFFC00162) */
|
| 69 |
|
|
#define pSIC_IMASK1 ((volatile unsigned long *)SIC_IMASK1)
|
| 70 |
|
|
#define pSIC_IAR4 ((volatile unsigned long *)SIC_IAR4)
|
| 71 |
|
|
#define pSIC_IAR5 ((volatile unsigned long *)SIC_IAR5)
|
| 72 |
|
|
#define pSIC_IAR6 ((volatile unsigned long *)SIC_IAR6)
|
| 73 |
|
|
#define pSIC_IAR7 ((volatile unsigned long *)SIC_IAR7)
|
| 74 |
|
|
#define pSIC_ISR1 ((volatile unsigned long *)SIC_ISR1)
|
| 75 |
|
|
#define pSIC_IWR1 ((volatile unsigned long *)SIC_IWR1)
|
| 76 |
|
|
|
| 77 |
|
|
/* Watchdog Timer (0xFFC00200 - 0xFFC002FF) */
|
| 78 |
|
|
#define pWDOG_CTL ((volatile unsigned short *)WDOG_CTL)
|
| 79 |
|
|
#define pWDOG_CNT ((volatile unsigned long *)WDOG_CNT)
|
| 80 |
|
|
#define pWDOG_STAT ((volatile unsigned long *)WDOG_STAT)
|
| 81 |
|
|
|
| 82 |
|
|
|
| 83 |
|
|
/* Real Time Clock (0xFFC00300 - 0xFFC003FF) */
|
| 84 |
|
|
#define pRTC_STAT ((volatile unsigned long *)RTC_STAT)
|
| 85 |
|
|
#define pRTC_ICTL ((volatile unsigned short *)RTC_ICTL)
|
| 86 |
|
|
#define pRTC_ISTAT ((volatile unsigned short *)RTC_ISTAT)
|
| 87 |
|
|
#define pRTC_SWCNT ((volatile unsigned short *)RTC_SWCNT)
|
| 88 |
|
|
#define pRTC_ALARM ((volatile unsigned long *)RTC_ALARM)
|
| 89 |
|
|
#define pRTC_FAST ((volatile unsigned short *)RTC_FAST)
|
| 90 |
|
|
#define pRTC_PREN ((volatile unsigned short *)RTC_PREN)
|
| 91 |
|
|
|
| 92 |
|
|
|
| 93 |
|
|
/* UART0 Controller (0xFFC00400 - 0xFFC004FF) */
|
| 94 |
|
|
#define pUART0_THR ((volatile unsigned short *)UART0_THR)
|
| 95 |
|
|
#define pUART0_RBR ((volatile unsigned short *)UART0_RBR)
|
| 96 |
|
|
#define pUART0_DLL ((volatile unsigned short *)UART0_DLL)
|
| 97 |
|
|
#define pUART0_IER ((volatile unsigned short *)UART0_IER)
|
| 98 |
|
|
#define pUART0_DLH ((volatile unsigned short *)UART0_DLH)
|
| 99 |
|
|
#define pUART0_IIR ((volatile unsigned short *)UART0_IIR)
|
| 100 |
|
|
#define pUART0_LCR ((volatile unsigned short *)UART0_LCR)
|
| 101 |
|
|
#define pUART0_MCR ((volatile unsigned short *)UART0_MCR)
|
| 102 |
|
|
#define pUART0_LSR ((volatile unsigned short *)UART0_LSR)
|
| 103 |
|
|
#define pUART0_MSR ((volatile unsigned short *)UART0_LSR)
|
| 104 |
|
|
#define pUART0_SCR ((volatile unsigned short *)UART0_SCR)
|
| 105 |
|
|
#define pUART0_GCTL ((volatile unsigned short *)UART0_GCTL)
|
| 106 |
|
|
|
| 107 |
|
|
|
| 108 |
|
|
/* SPI0 Controller (0xFFC00500 - 0xFFC005FF)*/
|
| 109 |
|
|
#define pSPI0_CTL ((volatile unsigned short *)SPI0_CTL)
|
| 110 |
|
|
/* legacy register name (below) provided for backwards code compatibility */
|
| 111 |
|
|
#define pSPI_CTL pSPI0_CTL
|
| 112 |
|
|
#define pSPI0_FLG ((volatile unsigned short *)SPI0_FLG)
|
| 113 |
|
|
/* legacy register name (below) provided for backwards code compatibility */
|
| 114 |
|
|
#define pSPI_FLG pSPI0_FLG
|
| 115 |
|
|
#define pSPI0_STAT ((volatile unsigned short *)SPI0_STAT)
|
| 116 |
|
|
/* legacy register name (below) provided for backwards code compatibility */
|
| 117 |
|
|
#define pSPI_STAT pSPI0_STAT
|
| 118 |
|
|
#define pSPI0_TDBR ((volatile unsigned short *)SPI0_TDBR)
|
| 119 |
|
|
/* legacy register name (below) provided for backwards code compatibility */
|
| 120 |
|
|
#define pSPI_TDBR pSPI0_TDBR
|
| 121 |
|
|
#define pSPI0_RDBR ((volatile unsigned short *)SPI0_RDBR)
|
| 122 |
|
|
/* legacy register name (below) provided for backwards code compatibility */
|
| 123 |
|
|
#define pSPI_RDBR pSPI0_RDBR
|
| 124 |
|
|
#define pSPI0_BAUD ((volatile unsigned short *)SPI0_BAUD)
|
| 125 |
|
|
/* legacy register name (below) provided for backwards code compatibility */
|
| 126 |
|
|
#define pSPI_BAUD pSPI0_BAUD
|
| 127 |
|
|
#define pSPI0_SHADOW ((volatile unsigned short *)SPI0_SHADOW)
|
| 128 |
|
|
/* legacy register name (below) provided for backwards code compatibility */
|
| 129 |
|
|
#define pSPI_SHADOW pSPI0_SHADOW
|
| 130 |
|
|
|
| 131 |
|
|
|
| 132 |
|
|
/* TIMER0-7 Registers (0xFFC00600 - 0xFFC006FF) */
|
| 133 |
|
|
#define pTIMER0_CONFIG ((volatile unsigned short *)TIMER0_CONFIG)
|
| 134 |
|
|
#define pTIMER0_COUNTER ((volatile unsigned long *)TIMER0_COUNTER)
|
| 135 |
|
|
#define pTIMER0_PERIOD ((volatile unsigned long *)TIMER0_PERIOD)
|
| 136 |
|
|
#define pTIMER0_WIDTH ((volatile unsigned long *)TIMER0_WIDTH)
|
| 137 |
|
|
|
| 138 |
|
|
#define pTIMER1_CONFIG ((volatile unsigned short *)TIMER1_CONFIG)
|
| 139 |
|
|
#define pTIMER1_COUNTER ((volatile unsigned long *)TIMER1_COUNTER)
|
| 140 |
|
|
#define pTIMER1_PERIOD ((volatile unsigned long *)TIMER1_PERIOD)
|
| 141 |
|
|
#define pTIMER1_WIDTH ((volatile unsigned long *)TIMER1_WIDTH)
|
| 142 |
|
|
|
| 143 |
|
|
#define pTIMER2_CONFIG ((volatile unsigned short *)TIMER2_CONFIG)
|
| 144 |
|
|
#define pTIMER2_COUNTER ((volatile unsigned long *)TIMER2_COUNTER)
|
| 145 |
|
|
#define pTIMER2_PERIOD ((volatile unsigned long *)TIMER2_PERIOD)
|
| 146 |
|
|
#define pTIMER2_WIDTH ((volatile unsigned long *)TIMER2_WIDTH)
|
| 147 |
|
|
|
| 148 |
|
|
#define pTIMER3_CONFIG ((volatile unsigned short *)TIMER3_CONFIG)
|
| 149 |
|
|
#define pTIMER3_COUNTER ((volatile unsigned long *)TIMER3_COUNTER)
|
| 150 |
|
|
#define pTIMER3_PERIOD ((volatile unsigned long *)TIMER3_PERIOD)
|
| 151 |
|
|
#define pTIMER3_WIDTH ((volatile unsigned long *)TIMER3_WIDTH)
|
| 152 |
|
|
|
| 153 |
|
|
#define pTIMER4_CONFIG ((volatile unsigned short *)TIMER4_CONFIG)
|
| 154 |
|
|
#define pTIMER4_COUNTER ((volatile unsigned long *)TIMER4_COUNTER)
|
| 155 |
|
|
#define pTIMER4_PERIOD ((volatile unsigned long *)TIMER4_PERIOD)
|
| 156 |
|
|
#define pTIMER4_WIDTH ((volatile unsigned long *)TIMER4_WIDTH)
|
| 157 |
|
|
|
| 158 |
|
|
#define pTIMER5_CONFIG ((volatile unsigned short *)TIMER5_CONFIG)
|
| 159 |
|
|
#define pTIMER5_COUNTER ((volatile unsigned long *)TIMER5_COUNTER)
|
| 160 |
|
|
#define pTIMER5_PERIOD ((volatile unsigned long *)TIMER5_PERIOD)
|
| 161 |
|
|
#define pTIMER5_WIDTH ((volatile unsigned long *)TIMER5_WIDTH)
|
| 162 |
|
|
|
| 163 |
|
|
#define pTIMER6_CONFIG ((volatile unsigned short *)TIMER6_CONFIG)
|
| 164 |
|
|
#define pTIMER6_COUNTER ((volatile unsigned long *)TIMER6_COUNTER)
|
| 165 |
|
|
#define pTIMER6_PERIOD ((volatile unsigned long *)TIMER6_PERIOD)
|
| 166 |
|
|
#define pTIMER6_WIDTH ((volatile unsigned long *)TIMER6_WIDTH)
|
| 167 |
|
|
|
| 168 |
|
|
#define pTIMER7_CONFIG ((volatile unsigned short *)TIMER7_CONFIG)
|
| 169 |
|
|
#define pTIMER7_COUNTER ((volatile unsigned long *)TIMER7_COUNTER)
|
| 170 |
|
|
#define pTIMER7_PERIOD ((volatile unsigned long *)TIMER7_PERIOD)
|
| 171 |
|
|
#define pTIMER7_WIDTH ((volatile unsigned long *)TIMER7_WIDTH)
|
| 172 |
|
|
|
| 173 |
|
|
#define pTIMER_ENABLE ((volatile unsigned short *)TIMER_ENABLE)
|
| 174 |
|
|
#define pTIMER_DISABLE ((volatile unsigned short *)TIMER_DISABLE)
|
| 175 |
|
|
#define pTIMER_STATUS ((volatile unsigned long *)TIMER_STATUS)
|
| 176 |
|
|
|
| 177 |
|
|
|
| 178 |
|
|
/* General Purpose I/O Port F (0xFFC00700 - 0xFFC007FF) */
|
| 179 |
|
|
#define pPORTFIO ((volatile unsigned short *)PORTFIO)
|
| 180 |
|
|
#define pPORTFIO_CLEAR ((volatile unsigned short *)PORTFIO_CLEAR)
|
| 181 |
|
|
#define pPORTFIO_SET ((volatile unsigned short *)PORTFIO_SET)
|
| 182 |
|
|
#define pPORTFIO_TOGGLE ((volatile unsigned short *)PORTFIO_TOGGLE)
|
| 183 |
|
|
#define pPORTFIO_MASKA ((volatile unsigned short *)PORTFIO_MASKA)
|
| 184 |
|
|
#define pPORTFIO_MASKA_CLEAR ((volatile unsigned short *)PORTFIO_MASKA_CLEAR)
|
| 185 |
|
|
#define pPORTFIO_MASKA_SET ((volatile unsigned short *)PORTFIO_MASKA_SET)
|
| 186 |
|
|
#define pPORTFIO_MASKA_TOGGLE ((volatile unsigned short *)PORTFIO_MASKA_TOGGLE)
|
| 187 |
|
|
#define pPORTFIO_MASKB ((volatile unsigned short *)PORTFIO_MASKB)
|
| 188 |
|
|
#define pPORTFIO_MASKB_CLEAR ((volatile unsigned short *)PORTFIO_MASKB_CLEAR)
|
| 189 |
|
|
#define pPORTFIO_MASKB_SET ((volatile unsigned short *)PORTFIO_MASKB_SET)
|
| 190 |
|
|
#define pPORTFIO_MASKB_TOGGLE ((volatile unsigned short *)PORTFIO_MASKB_TOGGLE)
|
| 191 |
|
|
#define pPORTFIO_DIR ((volatile unsigned short *)PORTFIO_DIR)
|
| 192 |
|
|
#define pPORTFIO_POLAR ((volatile unsigned short *)PORTFIO_POLAR)
|
| 193 |
|
|
#define pPORTFIO_EDGE ((volatile unsigned short *)PORTFIO_EDGE)
|
| 194 |
|
|
#define pPORTFIO_BOTH ((volatile unsigned short *)PORTFIO_BOTH)
|
| 195 |
|
|
#define pPORTFIO_INEN ((volatile unsigned short *)PORTFIO_INEN)
|
| 196 |
|
|
|
| 197 |
|
|
|
| 198 |
|
|
/* SPORT0 Controller (0xFFC00800 - 0xFFC008FF) */
|
| 199 |
|
|
#define pSPORT0_TCR1 ((volatile unsigned short *)SPORT0_TCR1)
|
| 200 |
|
|
#define pSPORT0_TCR2 ((volatile unsigned short *)SPORT0_TCR2)
|
| 201 |
|
|
#define pSPORT0_TCLKDIV ((volatile unsigned short *)SPORT0_TCLKDIV)
|
| 202 |
|
|
#define pSPORT0_TFSDIV ((volatile unsigned short *)SPORT0_TFSDIV)
|
| 203 |
|
|
#define pSPORT0_TX ((volatile unsigned long *)SPORT0_TX)
|
| 204 |
|
|
#define pSPORT0_RX ((volatile unsigned long *)SPORT0_RX)
|
| 205 |
|
|
#define pSPORT0_TX32 ((volatile unsigned long *)SPORT0_TX)
|
| 206 |
|
|
#define pSPORT0_RX32 ((volatile unsigned long *)SPORT0_RX)
|
| 207 |
|
|
#define pSPORT0_TX16 ((volatile unsigned short *)SPORT0_TX)
|
| 208 |
|
|
#define pSPORT0_RX16 ((volatile unsigned short *)SPORT0_RX)
|
| 209 |
|
|
#define pSPORT0_RCR1 ((volatile unsigned short *)SPORT0_RCR1)
|
| 210 |
|
|
#define pSPORT0_RCR2 ((volatile unsigned short *)SPORT0_RCR2)
|
| 211 |
|
|
#define pSPORT0_RCLKDIV ((volatile unsigned short *)SPORT0_RCLKDIV)
|
| 212 |
|
|
#define pSPORT0_RFSDIV ((volatile unsigned short *)SPORT0_RFSDIV)
|
| 213 |
|
|
#define pSPORT0_STAT ((volatile unsigned short *)SPORT0_STAT)
|
| 214 |
|
|
#define pSPORT0_CHNL ((volatile unsigned short *)SPORT0_CHNL)
|
| 215 |
|
|
#define pSPORT0_MCMC1 ((volatile unsigned short *)SPORT0_MCMC1)
|
| 216 |
|
|
#define pSPORT0_MCMC2 ((volatile unsigned short *)SPORT0_MCMC2)
|
| 217 |
|
|
#define pSPORT0_MTCS0 ((volatile unsigned long *)SPORT0_MTCS0)
|
| 218 |
|
|
#define pSPORT0_MTCS1 ((volatile unsigned long *)SPORT0_MTCS1)
|
| 219 |
|
|
#define pSPORT0_MTCS2 ((volatile unsigned long *)SPORT0_MTCS2)
|
| 220 |
|
|
#define pSPORT0_MTCS3 ((volatile unsigned long *)SPORT0_MTCS3)
|
| 221 |
|
|
#define pSPORT0_MRCS0 ((volatile unsigned long *)SPORT0_MRCS0)
|
| 222 |
|
|
#define pSPORT0_MRCS1 ((volatile unsigned long *)SPORT0_MRCS1)
|
| 223 |
|
|
#define pSPORT0_MRCS2 ((volatile unsigned long *)SPORT0_MRCS2)
|
| 224 |
|
|
#define pSPORT0_MRCS3 ((volatile unsigned long *)SPORT0_MRCS3)
|
| 225 |
|
|
|
| 226 |
|
|
|
| 227 |
|
|
/* SPORT1 Controller (0xFFC00900 - 0xFFC009FF) */
|
| 228 |
|
|
#define pSPORT1_TCR1 ((volatile unsigned short *)SPORT1_TCR1)
|
| 229 |
|
|
#define pSPORT1_TCR2 ((volatile unsigned short *)SPORT1_TCR2)
|
| 230 |
|
|
#define pSPORT1_TCLKDIV ((volatile unsigned short *)SPORT1_TCLKDIV)
|
| 231 |
|
|
#define pSPORT1_TFSDIV ((volatile unsigned short *)SPORT1_TFSDIV)
|
| 232 |
|
|
#define pSPORT1_TX ((volatile unsigned long *)SPORT1_TX)
|
| 233 |
|
|
#define pSPORT1_RX ((volatile unsigned long *)SPORT1_RX)
|
| 234 |
|
|
#define pSPORT1_TX32 ((volatile unsigned long *)SPORT1_TX)
|
| 235 |
|
|
#define pSPORT1_RX32 ((volatile unsigned long *)SPORT1_RX)
|
| 236 |
|
|
#define pSPORT1_TX16 ((volatile unsigned short *)SPORT1_TX)
|
| 237 |
|
|
#define pSPORT1_RX16 ((volatile unsigned short *)SPORT1_RX)
|
| 238 |
|
|
#define pSPORT1_RCR1 ((volatile unsigned short *)SPORT1_RCR1)
|
| 239 |
|
|
#define pSPORT1_RCR2 ((volatile unsigned short *)SPORT1_RCR2)
|
| 240 |
|
|
#define pSPORT1_RCLKDIV ((volatile unsigned short *)SPORT1_RCLKDIV)
|
| 241 |
|
|
#define pSPORT1_RFSDIV ((volatile unsigned short *)SPORT1_RFSDIV)
|
| 242 |
|
|
#define pSPORT1_STAT ((volatile unsigned short *)SPORT1_STAT)
|
| 243 |
|
|
#define pSPORT1_CHNL ((volatile unsigned short *)SPORT1_CHNL)
|
| 244 |
|
|
#define pSPORT1_MCMC1 ((volatile unsigned short *)SPORT1_MCMC1)
|
| 245 |
|
|
#define pSPORT1_MCMC2 ((volatile unsigned short *)SPORT1_MCMC2)
|
| 246 |
|
|
#define pSPORT1_MTCS0 ((volatile unsigned long *)SPORT1_MTCS0)
|
| 247 |
|
|
#define pSPORT1_MTCS1 ((volatile unsigned long *)SPORT1_MTCS1)
|
| 248 |
|
|
#define pSPORT1_MTCS2 ((volatile unsigned long *)SPORT1_MTCS2)
|
| 249 |
|
|
#define pSPORT1_MTCS3 ((volatile unsigned long *)SPORT1_MTCS3)
|
| 250 |
|
|
#define pSPORT1_MRCS0 ((volatile unsigned long *)SPORT1_MRCS0)
|
| 251 |
|
|
#define pSPORT1_MRCS1 ((volatile unsigned long *)SPORT1_MRCS1)
|
| 252 |
|
|
#define pSPORT1_MRCS2 ((volatile unsigned long *)SPORT1_MRCS2)
|
| 253 |
|
|
#define pSPORT1_MRCS3 ((volatile unsigned long *)SPORT1_MRCS3)
|
| 254 |
|
|
|
| 255 |
|
|
|
| 256 |
|
|
/* External Bus Interface Unit (0xFFC00A00 - 0xFFC00AFF) */
|
| 257 |
|
|
#define pEBIU_AMGCTL ((volatile unsigned short *)EBIU_AMGCTL)
|
| 258 |
|
|
#define pEBIU_AMBCTL0 ((volatile unsigned long *)EBIU_AMBCTL0)
|
| 259 |
|
|
#define pEBIU_AMBCTL1 ((volatile unsigned long *)EBIU_AMBCTL1)
|
| 260 |
|
|
#define pEBIU_SDGCTL ((volatile unsigned long *)EBIU_SDGCTL)
|
| 261 |
|
|
#define pEBIU_SDBCTL ((volatile unsigned short *)EBIU_SDBCTL)
|
| 262 |
|
|
#define pEBIU_SDRRC ((volatile unsigned short *)EBIU_SDRRC)
|
| 263 |
|
|
#define pEBIU_SDSTAT ((volatile unsigned short *)EBIU_SDSTAT)
|
| 264 |
|
|
|
| 265 |
|
|
|
| 266 |
|
|
/* DMA Traffic Control Registers (0xFFC00B00 - 0xFFC00BFF) */
|
| 267 |
|
|
#define pDMA_TC_PER ((volatile unsigned short *)DMA_TC_PER)
|
| 268 |
|
|
#define pDMA_TC_CNT ((volatile unsigned short *)DMA_TC_CNT)
|
| 269 |
|
|
|
| 270 |
|
|
/* Alternate deprecated register names (below) provided for backwards code compatibility */
|
| 271 |
|
|
#define pDMA_TCPER ((volatile unsigned short *)DMA_TCPER)
|
| 272 |
|
|
#define pDMA_TCCNT ((volatile unsigned short *)DMA_TCCNT)
|
| 273 |
|
|
|
| 274 |
|
|
/* DMA Controller (0xFFC00C00 - FFC00FFF)*/
|
| 275 |
|
|
#define pDMA0_CONFIG ((volatile unsigned short *)DMA0_CONFIG)
|
| 276 |
|
|
#define pDMA0_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA0_NEXT_DESC_PTR)
|
| 277 |
|
|
#define pDMA0_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA0_START_ADDR)
|
| 278 |
|
|
#define pDMA0_X_COUNT ((volatile unsigned short *)DMA0_X_COUNT)
|
| 279 |
|
|
#define pDMA0_Y_COUNT ((volatile unsigned short *)DMA0_Y_COUNT)
|
| 280 |
|
|
#define pDMA0_X_MODIFY ((volatile signed short *)DMA0_X_MODIFY)
|
| 281 |
|
|
#define pDMA0_Y_MODIFY ((volatile signed short *)DMA0_Y_MODIFY)
|
| 282 |
|
|
#define pDMA0_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA0_CURR_DESC_PTR)
|
| 283 |
|
|
#define pDMA0_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA0_CURR_ADDR)
|
| 284 |
|
|
#define pDMA0_CURR_X_COUNT ((volatile unsigned short *)DMA0_CURR_X_COUNT)
|
| 285 |
|
|
#define pDMA0_CURR_Y_COUNT ((volatile unsigned short *)DMA0_CURR_Y_COUNT)
|
| 286 |
|
|
#define pDMA0_IRQ_STATUS ((volatile unsigned short *)DMA0_IRQ_STATUS)
|
| 287 |
|
|
#define pDMA0_PERIPHERAL_MAP ((volatile unsigned short *)DMA0_PERIPHERAL_MAP)
|
| 288 |
|
|
|
| 289 |
|
|
#define pDMA1_CONFIG ((volatile unsigned short *)DMA1_CONFIG)
|
| 290 |
|
|
#define pDMA1_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_NEXT_DESC_PTR)
|
| 291 |
|
|
#define pDMA1_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_START_ADDR)
|
| 292 |
|
|
#define pDMA1_X_COUNT ((volatile unsigned short *)DMA1_X_COUNT)
|
| 293 |
|
|
#define pDMA1_Y_COUNT ((volatile unsigned short *)DMA1_Y_COUNT)
|
| 294 |
|
|
#define pDMA1_X_MODIFY ((volatile signed short *)DMA1_X_MODIFY)
|
| 295 |
|
|
#define pDMA1_Y_MODIFY ((volatile signed short *)DMA1_Y_MODIFY)
|
| 296 |
|
|
#define pDMA1_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_CURR_DESC_PTR)
|
| 297 |
|
|
#define pDMA1_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_CURR_ADDR)
|
| 298 |
|
|
#define pDMA1_CURR_X_COUNT ((volatile unsigned short *)DMA1_CURR_X_COUNT)
|
| 299 |
|
|
#define pDMA1_CURR_Y_COUNT ((volatile unsigned short *)DMA1_CURR_Y_COUNT)
|
| 300 |
|
|
#define pDMA1_IRQ_STATUS ((volatile unsigned short *)DMA1_IRQ_STATUS)
|
| 301 |
|
|
#define pDMA1_PERIPHERAL_MAP ((volatile unsigned short *)DMA1_PERIPHERAL_MAP)
|
| 302 |
|
|
|
| 303 |
|
|
#define pDMA2_CONFIG ((volatile unsigned short *)DMA2_CONFIG)
|
| 304 |
|
|
#define pDMA2_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_NEXT_DESC_PTR)
|
| 305 |
|
|
#define pDMA2_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_START_ADDR)
|
| 306 |
|
|
#define pDMA2_X_COUNT ((volatile unsigned short *)DMA2_X_COUNT)
|
| 307 |
|
|
#define pDMA2_Y_COUNT ((volatile unsigned short *)DMA2_Y_COUNT)
|
| 308 |
|
|
#define pDMA2_X_MODIFY ((volatile signed short *)DMA2_X_MODIFY)
|
| 309 |
|
|
#define pDMA2_Y_MODIFY ((volatile signed short *)DMA2_Y_MODIFY)
|
| 310 |
|
|
#define pDMA2_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_CURR_DESC_PTR)
|
| 311 |
|
|
#define pDMA2_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_CURR_ADDR)
|
| 312 |
|
|
#define pDMA2_CURR_X_COUNT ((volatile unsigned short *)DMA2_CURR_X_COUNT)
|
| 313 |
|
|
#define pDMA2_CURR_Y_COUNT ((volatile unsigned short *)DMA2_CURR_Y_COUNT)
|
| 314 |
|
|
#define pDMA2_IRQ_STATUS ((volatile unsigned short *)DMA2_IRQ_STATUS)
|
| 315 |
|
|
#define pDMA2_PERIPHERAL_MAP ((volatile unsigned short *)DMA2_PERIPHERAL_MAP)
|
| 316 |
|
|
|
| 317 |
|
|
#define pDMA3_CONFIG ((volatile unsigned short *)DMA3_CONFIG)
|
| 318 |
|
|
#define pDMA3_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA3_NEXT_DESC_PTR)
|
| 319 |
|
|
#define pDMA3_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA3_START_ADDR)
|
| 320 |
|
|
#define pDMA3_X_COUNT ((volatile unsigned short *)DMA3_X_COUNT)
|
| 321 |
|
|
#define pDMA3_Y_COUNT ((volatile unsigned short *)DMA3_Y_COUNT)
|
| 322 |
|
|
#define pDMA3_X_MODIFY ((volatile signed short *)DMA3_X_MODIFY)
|
| 323 |
|
|
#define pDMA3_Y_MODIFY ((volatile signed short *)DMA3_Y_MODIFY)
|
| 324 |
|
|
#define pDMA3_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA3_CURR_DESC_PTR)
|
| 325 |
|
|
#define pDMA3_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA3_CURR_ADDR)
|
| 326 |
|
|
#define pDMA3_CURR_X_COUNT ((volatile unsigned short *)DMA3_CURR_X_COUNT)
|
| 327 |
|
|
#define pDMA3_CURR_Y_COUNT ((volatile unsigned short *)DMA3_CURR_Y_COUNT)
|
| 328 |
|
|
#define pDMA3_IRQ_STATUS ((volatile unsigned short *)DMA3_IRQ_STATUS)
|
| 329 |
|
|
#define pDMA3_PERIPHERAL_MAP ((volatile unsigned short *)DMA3_PERIPHERAL_MAP)
|
| 330 |
|
|
|
| 331 |
|
|
#define pDMA4_CONFIG ((volatile unsigned short *)DMA4_CONFIG)
|
| 332 |
|
|
#define pDMA4_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA4_NEXT_DESC_PTR)
|
| 333 |
|
|
#define pDMA4_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA4_START_ADDR)
|
| 334 |
|
|
#define pDMA4_X_COUNT ((volatile unsigned short *)DMA4_X_COUNT)
|
| 335 |
|
|
#define pDMA4_Y_COUNT ((volatile unsigned short *)DMA4_Y_COUNT)
|
| 336 |
|
|
#define pDMA4_X_MODIFY ((volatile signed short *)DMA4_X_MODIFY)
|
| 337 |
|
|
#define pDMA4_Y_MODIFY ((volatile signed short *)DMA4_Y_MODIFY)
|
| 338 |
|
|
#define pDMA4_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA4_CURR_DESC_PTR)
|
| 339 |
|
|
#define pDMA4_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA4_CURR_ADDR)
|
| 340 |
|
|
#define pDMA4_CURR_X_COUNT ((volatile unsigned short *)DMA4_CURR_X_COUNT)
|
| 341 |
|
|
#define pDMA4_CURR_Y_COUNT ((volatile unsigned short *)DMA4_CURR_Y_COUNT)
|
| 342 |
|
|
#define pDMA4_IRQ_STATUS ((volatile unsigned short *)DMA4_IRQ_STATUS)
|
| 343 |
|
|
#define pDMA4_PERIPHERAL_MAP ((volatile unsigned short *)DMA4_PERIPHERAL_MAP)
|
| 344 |
|
|
|
| 345 |
|
|
#define pDMA5_CONFIG ((volatile unsigned short *)DMA5_CONFIG)
|
| 346 |
|
|
#define pDMA5_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA5_NEXT_DESC_PTR)
|
| 347 |
|
|
#define pDMA5_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA5_START_ADDR)
|
| 348 |
|
|
#define pDMA5_X_COUNT ((volatile unsigned short *)DMA5_X_COUNT)
|
| 349 |
|
|
#define pDMA5_Y_COUNT ((volatile unsigned short *)DMA5_Y_COUNT)
|
| 350 |
|
|
#define pDMA5_X_MODIFY ((volatile signed short *)DMA5_X_MODIFY)
|
| 351 |
|
|
#define pDMA5_Y_MODIFY ((volatile signed short *)DMA5_Y_MODIFY)
|
| 352 |
|
|
#define pDMA5_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA5_CURR_DESC_PTR)
|
| 353 |
|
|
#define pDMA5_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA5_CURR_ADDR)
|
| 354 |
|
|
#define pDMA5_CURR_X_COUNT ((volatile unsigned short *)DMA5_CURR_X_COUNT)
|
| 355 |
|
|
#define pDMA5_CURR_Y_COUNT ((volatile unsigned short *)DMA5_CURR_Y_COUNT)
|
| 356 |
|
|
#define pDMA5_IRQ_STATUS ((volatile unsigned short *)DMA5_IRQ_STATUS)
|
| 357 |
|
|
#define pDMA5_PERIPHERAL_MAP ((volatile unsigned short *)DMA5_PERIPHERAL_MAP)
|
| 358 |
|
|
|
| 359 |
|
|
#define pDMA6_CONFIG ((volatile unsigned short *)DMA6_CONFIG)
|
| 360 |
|
|
#define pDMA6_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA6_NEXT_DESC_PTR)
|
| 361 |
|
|
#define pDMA6_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA6_START_ADDR)
|
| 362 |
|
|
#define pDMA6_X_COUNT ((volatile unsigned short *)DMA6_X_COUNT)
|
| 363 |
|
|
#define pDMA6_Y_COUNT ((volatile unsigned short *)DMA6_Y_COUNT)
|
| 364 |
|
|
#define pDMA6_X_MODIFY ((volatile signed short *)DMA6_X_MODIFY)
|
| 365 |
|
|
#define pDMA6_Y_MODIFY ((volatile signed short *)DMA6_Y_MODIFY)
|
| 366 |
|
|
#define pDMA6_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA6_CURR_DESC_PTR)
|
| 367 |
|
|
#define pDMA6_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA6_CURR_ADDR)
|
| 368 |
|
|
#define pDMA6_CURR_X_COUNT ((volatile unsigned short *)DMA6_CURR_X_COUNT)
|
| 369 |
|
|
#define pDMA6_CURR_Y_COUNT ((volatile unsigned short *)DMA6_CURR_Y_COUNT)
|
| 370 |
|
|
#define pDMA6_IRQ_STATUS ((volatile unsigned short *)DMA6_IRQ_STATUS)
|
| 371 |
|
|
#define pDMA6_PERIPHERAL_MAP ((volatile unsigned short *)DMA6_PERIPHERAL_MAP)
|
| 372 |
|
|
|
| 373 |
|
|
#define pDMA7_CONFIG ((volatile unsigned short *)DMA7_CONFIG)
|
| 374 |
|
|
#define pDMA7_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA7_NEXT_DESC_PTR)
|
| 375 |
|
|
#define pDMA7_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA7_START_ADDR)
|
| 376 |
|
|
#define pDMA7_X_COUNT ((volatile unsigned short *)DMA7_X_COUNT)
|
| 377 |
|
|
#define pDMA7_Y_COUNT ((volatile unsigned short *)DMA7_Y_COUNT)
|
| 378 |
|
|
#define pDMA7_X_MODIFY ((volatile signed short *)DMA7_X_MODIFY)
|
| 379 |
|
|
#define pDMA7_Y_MODIFY ((volatile signed short *)DMA7_Y_MODIFY)
|
| 380 |
|
|
#define pDMA7_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA7_CURR_DESC_PTR)
|
| 381 |
|
|
#define pDMA7_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA7_CURR_ADDR)
|
| 382 |
|
|
#define pDMA7_CURR_X_COUNT ((volatile unsigned short *)DMA7_CURR_X_COUNT)
|
| 383 |
|
|
#define pDMA7_CURR_Y_COUNT ((volatile unsigned short *)DMA7_CURR_Y_COUNT)
|
| 384 |
|
|
#define pDMA7_IRQ_STATUS ((volatile unsigned short *)DMA7_IRQ_STATUS)
|
| 385 |
|
|
#define pDMA7_PERIPHERAL_MAP ((volatile unsigned short *)DMA7_PERIPHERAL_MAP)
|
| 386 |
|
|
|
| 387 |
|
|
#define pDMA8_CONFIG ((volatile unsigned short *)DMA8_CONFIG)
|
| 388 |
|
|
#define pDMA8_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA8_NEXT_DESC_PTR)
|
| 389 |
|
|
#define pDMA8_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA8_START_ADDR)
|
| 390 |
|
|
#define pDMA8_X_COUNT ((volatile unsigned short *)DMA8_X_COUNT)
|
| 391 |
|
|
#define pDMA8_Y_COUNT ((volatile unsigned short *)DMA8_Y_COUNT)
|
| 392 |
|
|
#define pDMA8_X_MODIFY ((volatile signed short *)DMA8_X_MODIFY)
|
| 393 |
|
|
#define pDMA8_Y_MODIFY ((volatile signed short *)DMA8_Y_MODIFY)
|
| 394 |
|
|
#define pDMA8_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA8_CURR_DESC_PTR)
|
| 395 |
|
|
#define pDMA8_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA8_CURR_ADDR)
|
| 396 |
|
|
#define pDMA8_CURR_X_COUNT ((volatile unsigned short *)DMA8_CURR_X_COUNT)
|
| 397 |
|
|
#define pDMA8_CURR_Y_COUNT ((volatile unsigned short *)DMA8_CURR_Y_COUNT)
|
| 398 |
|
|
#define pDMA8_IRQ_STATUS ((volatile unsigned short *)DMA8_IRQ_STATUS)
|
| 399 |
|
|
#define pDMA8_PERIPHERAL_MAP ((volatile unsigned short *)DMA8_PERIPHERAL_MAP)
|
| 400 |
|
|
|
| 401 |
|
|
#define pDMA9_CONFIG ((volatile unsigned short *)DMA9_CONFIG)
|
| 402 |
|
|
#define pDMA9_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA9_NEXT_DESC_PTR)
|
| 403 |
|
|
#define pDMA9_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA9_START_ADDR)
|
| 404 |
|
|
#define pDMA9_X_COUNT ((volatile unsigned short *)DMA9_X_COUNT)
|
| 405 |
|
|
#define pDMA9_Y_COUNT ((volatile unsigned short *)DMA9_Y_COUNT)
|
| 406 |
|
|
#define pDMA9_X_MODIFY ((volatile signed short *)DMA9_X_MODIFY)
|
| 407 |
|
|
#define pDMA9_Y_MODIFY ((volatile signed short *)DMA9_Y_MODIFY)
|
| 408 |
|
|
#define pDMA9_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA9_CURR_DESC_PTR)
|
| 409 |
|
|
#define pDMA9_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA9_CURR_ADDR)
|
| 410 |
|
|
#define pDMA9_CURR_X_COUNT ((volatile unsigned short *)DMA9_CURR_X_COUNT)
|
| 411 |
|
|
#define pDMA9_CURR_Y_COUNT ((volatile unsigned short *)DMA9_CURR_Y_COUNT)
|
| 412 |
|
|
#define pDMA9_IRQ_STATUS ((volatile unsigned short *)DMA9_IRQ_STATUS)
|
| 413 |
|
|
#define pDMA9_PERIPHERAL_MAP ((volatile unsigned short *)DMA9_PERIPHERAL_MAP)
|
| 414 |
|
|
|
| 415 |
|
|
#define pDMA10_CONFIG ((volatile unsigned short *)DMA10_CONFIG)
|
| 416 |
|
|
#define pDMA10_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA10_NEXT_DESC_PTR)
|
| 417 |
|
|
#define pDMA10_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA10_START_ADDR)
|
| 418 |
|
|
#define pDMA10_X_COUNT ((volatile unsigned short *)DMA10_X_COUNT)
|
| 419 |
|
|
#define pDMA10_Y_COUNT ((volatile unsigned short *)DMA10_Y_COUNT)
|
| 420 |
|
|
#define pDMA10_X_MODIFY ((volatile signed short *)DMA10_X_MODIFY)
|
| 421 |
|
|
#define pDMA10_Y_MODIFY ((volatile signed short *)DMA10_Y_MODIFY)
|
| 422 |
|
|
#define pDMA10_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA10_CURR_DESC_PTR)
|
| 423 |
|
|
#define pDMA10_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA10_CURR_ADDR)
|
| 424 |
|
|
#define pDMA10_CURR_X_COUNT ((volatile unsigned short *)DMA10_CURR_X_COUNT)
|
| 425 |
|
|
#define pDMA10_CURR_Y_COUNT ((volatile unsigned short *)DMA10_CURR_Y_COUNT)
|
| 426 |
|
|
#define pDMA10_IRQ_STATUS ((volatile unsigned short *)DMA10_IRQ_STATUS)
|
| 427 |
|
|
#define pDMA10_PERIPHERAL_MAP ((volatile unsigned short *)DMA10_PERIPHERAL_MAP)
|
| 428 |
|
|
|
| 429 |
|
|
#define pDMA11_CONFIG ((volatile unsigned short *)DMA11_CONFIG)
|
| 430 |
|
|
#define pDMA11_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA11_NEXT_DESC_PTR)
|
| 431 |
|
|
#define pDMA11_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA11_START_ADDR)
|
| 432 |
|
|
#define pDMA11_X_COUNT ((volatile unsigned short *)DMA11_X_COUNT)
|
| 433 |
|
|
#define pDMA11_Y_COUNT ((volatile unsigned short *)DMA11_Y_COUNT)
|
| 434 |
|
|
#define pDMA11_X_MODIFY ((volatile signed short *)DMA11_X_MODIFY)
|
| 435 |
|
|
#define pDMA11_Y_MODIFY ((volatile signed short *)DMA11_Y_MODIFY)
|
| 436 |
|
|
#define pDMA11_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA11_CURR_DESC_PTR)
|
| 437 |
|
|
#define pDMA11_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA11_CURR_ADDR)
|
| 438 |
|
|
#define pDMA11_CURR_X_COUNT ((volatile unsigned short *)DMA11_CURR_X_COUNT)
|
| 439 |
|
|
#define pDMA11_CURR_Y_COUNT ((volatile unsigned short *)DMA11_CURR_Y_COUNT)
|
| 440 |
|
|
#define pDMA11_IRQ_STATUS ((volatile unsigned short *)DMA11_IRQ_STATUS)
|
| 441 |
|
|
#define pDMA11_PERIPHERAL_MAP ((volatile unsigned short *)DMA11_PERIPHERAL_MAP)
|
| 442 |
|
|
|
| 443 |
|
|
#define pMDMA_D0_CONFIG ((volatile unsigned short *)MDMA_D0_CONFIG)
|
| 444 |
|
|
#define pMDMA_D0_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA_D0_NEXT_DESC_PTR)
|
| 445 |
|
|
#define pMDMA_D0_START_ADDR (_PTR_TO_VOL_VOID_PTR MDMA_D0_START_ADDR)
|
| 446 |
|
|
#define pMDMA_D0_X_COUNT ((volatile unsigned short *)MDMA_D0_X_COUNT)
|
| 447 |
|
|
#define pMDMA_D0_Y_COUNT ((volatile unsigned short *)MDMA_D0_Y_COUNT)
|
| 448 |
|
|
#define pMDMA_D0_X_MODIFY ((volatile signed short *)MDMA_D0_X_MODIFY)
|
| 449 |
|
|
#define pMDMA_D0_Y_MODIFY ((volatile signed short *)MDMA_D0_Y_MODIFY)
|
| 450 |
|
|
#define pMDMA_D0_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA_D0_CURR_DESC_PTR)
|
| 451 |
|
|
#define pMDMA_D0_CURR_ADDR (_PTR_TO_VOL_VOID_PTR MDMA_D0_CURR_ADDR)
|
| 452 |
|
|
#define pMDMA_D0_CURR_X_COUNT ((volatile unsigned short *)MDMA_D0_CURR_X_COUNT)
|
| 453 |
|
|
#define pMDMA_D0_CURR_Y_COUNT ((volatile unsigned short *)MDMA_D0_CURR_Y_COUNT)
|
| 454 |
|
|
#define pMDMA_D0_IRQ_STATUS ((volatile unsigned short *)MDMA_D0_IRQ_STATUS)
|
| 455 |
|
|
#define pMDMA_D0_PERIPHERAL_MAP ((volatile unsigned short *)MDMA_D0_PERIPHERAL_MAP)
|
| 456 |
|
|
|
| 457 |
|
|
#define pMDMA_S0_CONFIG ((volatile unsigned short *)MDMA_S0_CONFIG)
|
| 458 |
|
|
#define pMDMA_S0_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA_S0_NEXT_DESC_PTR)
|
| 459 |
|
|
#define pMDMA_S0_START_ADDR (_PTR_TO_VOL_VOID_PTR MDMA_S0_START_ADDR)
|
| 460 |
|
|
#define pMDMA_S0_X_COUNT ((volatile unsigned short *)MDMA_S0_X_COUNT)
|
| 461 |
|
|
#define pMDMA_S0_Y_COUNT ((volatile unsigned short *)MDMA_S0_Y_COUNT)
|
| 462 |
|
|
#define pMDMA_S0_X_MODIFY ((volatile signed short *)MDMA_S0_X_MODIFY)
|
| 463 |
|
|
#define pMDMA_S0_Y_MODIFY ((volatile signed short *)MDMA_S0_Y_MODIFY)
|
| 464 |
|
|
#define pMDMA_S0_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA_S0_CURR_DESC_PTR)
|
| 465 |
|
|
#define pMDMA_S0_CURR_ADDR (_PTR_TO_VOL_VOID_PTR MDMA_S0_CURR_ADDR)
|
| 466 |
|
|
#define pMDMA_S0_CURR_X_COUNT ((volatile unsigned short *)MDMA_S0_CURR_X_COUNT)
|
| 467 |
|
|
#define pMDMA_S0_CURR_Y_COUNT ((volatile unsigned short *)MDMA_S0_CURR_Y_COUNT)
|
| 468 |
|
|
#define pMDMA_S0_IRQ_STATUS ((volatile unsigned short *)MDMA_S0_IRQ_STATUS)
|
| 469 |
|
|
#define pMDMA_S0_PERIPHERAL_MAP ((volatile unsigned short *)MDMA_S0_PERIPHERAL_MAP)
|
| 470 |
|
|
|
| 471 |
|
|
#define pMDMA_D1_CONFIG ((volatile unsigned short *)MDMA_D1_CONFIG)
|
| 472 |
|
|
#define pMDMA_D1_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA_D1_NEXT_DESC_PTR)
|
| 473 |
|
|
#define pMDMA_D1_START_ADDR (_PTR_TO_VOL_VOID_PTR MDMA_D1_START_ADDR)
|
| 474 |
|
|
#define pMDMA_D1_X_COUNT ((volatile unsigned short *)MDMA_D1_X_COUNT)
|
| 475 |
|
|
#define pMDMA_D1_Y_COUNT ((volatile unsigned short *)MDMA_D1_Y_COUNT)
|
| 476 |
|
|
#define pMDMA_D1_X_MODIFY ((volatile signed short *)MDMA_D1_X_MODIFY)
|
| 477 |
|
|
#define pMDMA_D1_Y_MODIFY ((volatile signed short *)MDMA_D1_Y_MODIFY)
|
| 478 |
|
|
#define pMDMA_D1_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA_D1_CURR_DESC_PTR)
|
| 479 |
|
|
#define pMDMA_D1_CURR_ADDR (_PTR_TO_VOL_VOID_PTR MDMA_D1_CURR_ADDR)
|
| 480 |
|
|
#define pMDMA_D1_CURR_X_COUNT ((volatile unsigned short *)MDMA_D1_CURR_X_COUNT)
|
| 481 |
|
|
#define pMDMA_D1_CURR_Y_COUNT ((volatile unsigned short *)MDMA_D1_CURR_Y_COUNT)
|
| 482 |
|
|
#define pMDMA_D1_IRQ_STATUS ((volatile unsigned short *)MDMA_D1_IRQ_STATUS)
|
| 483 |
|
|
#define pMDMA_D1_PERIPHERAL_MAP ((volatile unsigned short *)MDMA_D1_PERIPHERAL_MAP)
|
| 484 |
|
|
|
| 485 |
|
|
#define pMDMA_S1_CONFIG ((volatile unsigned short *)MDMA_S1_CONFIG)
|
| 486 |
|
|
#define pMDMA_S1_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA_S1_NEXT_DESC_PTR)
|
| 487 |
|
|
#define pMDMA_S1_START_ADDR (_PTR_TO_VOL_VOID_PTR MDMA_S1_START_ADDR)
|
| 488 |
|
|
#define pMDMA_S1_X_COUNT ((volatile unsigned short *)MDMA_S1_X_COUNT)
|
| 489 |
|
|
#define pMDMA_S1_Y_COUNT ((volatile unsigned short *)MDMA_S1_Y_COUNT)
|
| 490 |
|
|
#define pMDMA_S1_X_MODIFY ((volatile signed short *)MDMA_S1_X_MODIFY)
|
| 491 |
|
|
#define pMDMA_S1_Y_MODIFY ((volatile signed short *)MDMA_S1_Y_MODIFY)
|
| 492 |
|
|
#define pMDMA_S1_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA_S1_CURR_DESC_PTR)
|
| 493 |
|
|
#define pMDMA_S1_CURR_ADDR (_PTR_TO_VOL_VOID_PTR MDMA_S1_CURR_ADDR)
|
| 494 |
|
|
#define pMDMA_S1_CURR_X_COUNT ((volatile unsigned short *)MDMA_S1_CURR_X_COUNT)
|
| 495 |
|
|
#define pMDMA_S1_CURR_Y_COUNT ((volatile unsigned short *)MDMA_S1_CURR_Y_COUNT)
|
| 496 |
|
|
#define pMDMA_S1_IRQ_STATUS ((volatile unsigned short *)MDMA_S1_IRQ_STATUS)
|
| 497 |
|
|
#define pMDMA_S1_PERIPHERAL_MAP ((volatile unsigned short *)MDMA_S1_PERIPHERAL_MAP)
|
| 498 |
|
|
|
| 499 |
|
|
|
| 500 |
|
|
/* Parallel Peripheral Interface (0xFFC01000 - 0xFFC010FF) */
|
| 501 |
|
|
#define pPPI_CONTROL ((volatile unsigned short *)PPI_CONTROL)
|
| 502 |
|
|
#define pPPI_STATUS ((volatile unsigned short *)PPI_STATUS)
|
| 503 |
|
|
#define pPPI_DELAY ((volatile unsigned short *)PPI_DELAY)
|
| 504 |
|
|
#define pPPI_COUNT ((volatile unsigned short *)PPI_COUNT)
|
| 505 |
|
|
#define pPPI_FRAME ((volatile unsigned short *)PPI_FRAME)
|
| 506 |
|
|
|
| 507 |
|
|
|
| 508 |
|
|
/* Two-Wire Interface (0xFFC01400 - 0xFFC014FF) */
|
| 509 |
|
|
#define pTWI_CLKDIV ((volatile unsigned short *)TWI_CLKDIV)
|
| 510 |
|
|
#define pTWI_CONTROL ((volatile unsigned short *)TWI_CONTROL)
|
| 511 |
|
|
#define pTWI_SLAVE_CTL ((volatile unsigned short *)TWI_SLAVE_CTL)
|
| 512 |
|
|
#define pTWI_SLAVE_STAT ((volatile unsigned short *)TWI_SLAVE_STAT)
|
| 513 |
|
|
#define pTWI_SLAVE_ADDR ((volatile unsigned short *)TWI_SLAVE_ADDR)
|
| 514 |
|
|
#define pTWI_MASTER_CTL ((volatile unsigned short *)TWI_MASTER_CTL)
|
| 515 |
|
|
#define pTWI_MASTER_STAT ((volatile unsigned short *)TWI_MASTER_STAT)
|
| 516 |
|
|
#define pTWI_MASTER_ADDR ((volatile unsigned short *)TWI_MASTER_ADDR)
|
| 517 |
|
|
#define pTWI_INT_STAT ((volatile unsigned short *)TWI_INT_STAT)
|
| 518 |
|
|
#define pTWI_INT_MASK ((volatile unsigned short *)TWI_INT_MASK)
|
| 519 |
|
|
#define pTWI_FIFO_CTL ((volatile unsigned short *)TWI_FIFO_CTL)
|
| 520 |
|
|
#define pTWI_FIFO_STAT ((volatile unsigned short *)TWI_FIFO_STAT)
|
| 521 |
|
|
#define pTWI_XMT_DATA8 ((volatile unsigned short *)TWI_XMT_DATA8)
|
| 522 |
|
|
#define pTWI_XMT_DATA16 ((volatile unsigned short *)TWI_XMT_DATA16)
|
| 523 |
|
|
#define pTWI_RCV_DATA8 ((volatile unsigned short *)TWI_RCV_DATA8)
|
| 524 |
|
|
#define pTWI_RCV_DATA16 ((volatile unsigned short *)TWI_RCV_DATA16)
|
| 525 |
|
|
|
| 526 |
|
|
|
| 527 |
|
|
/* General Purpose I/O Port G (0xFFC01500 - 0xFFC015FF) */
|
| 528 |
|
|
#define pPORTGIO ((volatile unsigned short *)PORTGIO)
|
| 529 |
|
|
#define pPORTGIO_CLEAR ((volatile unsigned short *)PORTGIO_CLEAR)
|
| 530 |
|
|
#define pPORTGIO_SET ((volatile unsigned short *)PORTGIO_SET)
|
| 531 |
|
|
#define pPORTGIO_TOGGLE ((volatile unsigned short *)PORTGIO_TOGGLE)
|
| 532 |
|
|
#define pPORTGIO_MASKA ((volatile unsigned short *)PORTGIO_MASKA)
|
| 533 |
|
|
#define pPORTGIO_MASKA_CLEAR ((volatile unsigned short *)PORTGIO_MASKA_CLEAR)
|
| 534 |
|
|
#define pPORTGIO_MASKA_SET ((volatile unsigned short *)PORTGIO_MASKA_SET)
|
| 535 |
|
|
#define pPORTGIO_MASKA_TOGGLE ((volatile unsigned short *)PORTGIO_MASKA_TOGGLE)
|
| 536 |
|
|
#define pPORTGIO_MASKB ((volatile unsigned short *)PORTGIO_MASKB)
|
| 537 |
|
|
#define pPORTGIO_MASKB_CLEAR ((volatile unsigned short *)PORTGIO_MASKB_CLEAR)
|
| 538 |
|
|
#define pPORTGIO_MASKB_SET ((volatile unsigned short *)PORTGIO_MASKB_SET)
|
| 539 |
|
|
#define pPORTGIO_MASKB_TOGGLE ((volatile unsigned short *)PORTGIO_MASKB_TOGGLE)
|
| 540 |
|
|
#define pPORTGIO_DIR ((volatile unsigned short *)PORTGIO_DIR)
|
| 541 |
|
|
#define pPORTGIO_POLAR ((volatile unsigned short *)PORTGIO_POLAR)
|
| 542 |
|
|
#define pPORTGIO_EDGE ((volatile unsigned short *)PORTGIO_EDGE)
|
| 543 |
|
|
#define pPORTGIO_BOTH ((volatile unsigned short *)PORTGIO_BOTH)
|
| 544 |
|
|
#define pPORTGIO_INEN ((volatile unsigned short *)PORTGIO_INEN)
|
| 545 |
|
|
|
| 546 |
|
|
|
| 547 |
|
|
/* General Purpose I/O Port H (0xFFC01700 - 0xFFC017FF) */
|
| 548 |
|
|
#define pPORTHIO ((volatile unsigned short *)PORTHIO)
|
| 549 |
|
|
#define pPORTHIO_CLEAR ((volatile unsigned short *)PORTHIO_CLEAR)
|
| 550 |
|
|
#define pPORTHIO_SET ((volatile unsigned short *)PORTHIO_SET)
|
| 551 |
|
|
#define pPORTHIO_TOGGLE ((volatile unsigned short *)PORTHIO_TOGGLE)
|
| 552 |
|
|
#define pPORTHIO_MASKA ((volatile unsigned short *)PORTHIO_MASKA)
|
| 553 |
|
|
#define pPORTHIO_MASKA_CLEAR ((volatile unsigned short *)PORTHIO_MASKA_CLEAR)
|
| 554 |
|
|
#define pPORTHIO_MASKA_SET ((volatile unsigned short *)PORTHIO_MASKA_SET)
|
| 555 |
|
|
#define pPORTHIO_MASKA_TOGGLE ((volatile unsigned short *)PORTHIO_MASKA_TOGGLE)
|
| 556 |
|
|
#define pPORTHIO_MASKB ((volatile unsigned short *)PORTHIO_MASKB)
|
| 557 |
|
|
#define pPORTHIO_MASKB_CLEAR ((volatile unsigned short *)PORTHIO_MASKB_CLEAR)
|
| 558 |
|
|
#define pPORTHIO_MASKB_SET ((volatile unsigned short *)PORTHIO_MASKB_SET)
|
| 559 |
|
|
#define pPORTHIO_MASKB_TOGGLE ((volatile unsigned short *)PORTHIO_MASKB_TOGGLE)
|
| 560 |
|
|
#define pPORTHIO_DIR ((volatile unsigned short *)PORTHIO_DIR)
|
| 561 |
|
|
#define pPORTHIO_POLAR ((volatile unsigned short *)PORTHIO_POLAR)
|
| 562 |
|
|
#define pPORTHIO_EDGE ((volatile unsigned short *)PORTHIO_EDGE)
|
| 563 |
|
|
#define pPORTHIO_BOTH ((volatile unsigned short *)PORTHIO_BOTH)
|
| 564 |
|
|
#define pPORTHIO_INEN ((volatile unsigned short *)PORTHIO_INEN)
|
| 565 |
|
|
|
| 566 |
|
|
|
| 567 |
|
|
/* UART1 Controller (0xFFC02000 - 0xFFC020FF) */
|
| 568 |
|
|
#define pUART1_THR ((volatile unsigned short *)UART1_THR)
|
| 569 |
|
|
#define pUART1_RBR ((volatile unsigned short *)UART1_RBR)
|
| 570 |
|
|
#define pUART1_DLL ((volatile unsigned short *)UART1_DLL)
|
| 571 |
|
|
#define pUART1_IER ((volatile unsigned short *)UART1_IER)
|
| 572 |
|
|
#define pUART1_DLH ((volatile unsigned short *)UART1_DLH)
|
| 573 |
|
|
#define pUART1_IIR ((volatile unsigned short *)UART1_IIR)
|
| 574 |
|
|
#define pUART1_LCR ((volatile unsigned short *)UART1_LCR)
|
| 575 |
|
|
#define pUART1_MCR ((volatile unsigned short *)UART1_MCR)
|
| 576 |
|
|
#define pUART1_LSR ((volatile unsigned short *)UART1_LSR)
|
| 577 |
|
|
#define pUART1_MSR ((volatile unsigned short *)UART1_LSR)
|
| 578 |
|
|
#define pUART1_SCR ((volatile unsigned short *)UART1_SCR)
|
| 579 |
|
|
#define pUART1_GCTL ((volatile unsigned short *)UART1_GCTL)
|
| 580 |
|
|
|
| 581 |
|
|
|
| 582 |
|
|
/* Pin Control Registers (0xFFC03200 - 0xFFC032FF) */
|
| 583 |
|
|
#define pPORTF_FER ((volatile unsigned short *)PORTF_FER)
|
| 584 |
|
|
#define pPORTG_FER ((volatile unsigned short *)PORTG_FER)
|
| 585 |
|
|
#define pPORTH_FER ((volatile unsigned short *)PORTH_FER)
|
| 586 |
|
|
|
| 587 |
|
|
|
| 588 |
|
|
/* Handshake MDMA Registers (0xFFC03300 - 0xFFC033FF) */
|
| 589 |
|
|
#define pHMDMA0_CONTROL ((volatile unsigned short *)HMDMA0_CONTROL)
|
| 590 |
|
|
#define pHMDMA0_ECINIT ((volatile unsigned short *)HMDMA0_ECINIT)
|
| 591 |
|
|
#define pHMDMA0_BCINIT ((volatile unsigned short *)HMDMA0_BCINIT)
|
| 592 |
|
|
#define pHMDMA0_ECURGENT ((volatile unsigned short *)HMDMA0_ECURGENT)
|
| 593 |
|
|
#define pHMDMA0_ECOVERFLOW ((volatile unsigned short *)HMDMA0_ECOVERFLOW)
|
| 594 |
|
|
#define pHMDMA0_ECOUNT ((volatile unsigned short *)HMDMA0_ECOUNT)
|
| 595 |
|
|
#define pHMDMA0_BCOUNT ((volatile unsigned short *)HMDMA0_BCOUNT)
|
| 596 |
|
|
|
| 597 |
|
|
#define pHMDMA1_CONTROL ((volatile unsigned short *)HMDMA1_CONTROL)
|
| 598 |
|
|
#define pHMDMA1_ECINIT ((volatile unsigned short *)HMDMA1_ECINIT)
|
| 599 |
|
|
#define pHMDMA1_BCINIT ((volatile unsigned short *)HMDMA1_BCINIT)
|
| 600 |
|
|
#define pHMDMA1_ECURGENT ((volatile unsigned short *)HMDMA1_ECURGENT)
|
| 601 |
|
|
#define pHMDMA1_ECOVERFLOW ((volatile unsigned short *)HMDMA1_ECOVERFLOW)
|
| 602 |
|
|
#define pHMDMA1_ECOUNT ((volatile unsigned short *)HMDMA1_ECOUNT)
|
| 603 |
|
|
#define pHMDMA1_BCOUNT ((volatile unsigned short *)HMDMA1_BCOUNT)
|
| 604 |
|
|
|
| 605 |
|
|
|
| 606 |
|
|
/* GPIO PIN mux (0xFFC03210 - OxFFC03288) */
|
| 607 |
|
|
#define pPORTF_MUX ((volatile unsigned short *)PORTF_MUX)
|
| 608 |
|
|
#define pPORTG_MUX ((volatile unsigned short *)PORTG_MUX)
|
| 609 |
|
|
#define pPORTH_MUX ((volatile unsigned short *)PORTH_MUX)
|
| 610 |
|
|
#define pPORTF_DRIVE ((volatile unsigned short *)PORTF_DRIVE)
|
| 611 |
|
|
#define pPORTG_DRIVE ((volatile unsigned short *)PORTG_DRIVE)
|
| 612 |
|
|
#define pPORTH_DRIVE ((volatile unsigned short *)PORTH_DRIVE)
|
| 613 |
|
|
#define pPORTF_HYSTERESIS ((volatile unsigned short *)PORTF_HYSTERESIS)
|
| 614 |
|
|
#define pPORTG_HYSTERESIS ((volatile unsigned short *)PORTG_HYSTERESIS)
|
| 615 |
|
|
#define pPORTH_HYSTERESIS ((volatile unsigned short *)PORTH_HYSTERESIS)
|
| 616 |
|
|
#define pNONGPIO_DRIVE ((volatile unsigned short *)NONGPIO_DRIVE)
|
| 617 |
|
|
#define pNONGPIO_HYSTERESIS ((volatile unsigned short *)NONGPIO_HYSTERESIS)
|
| 618 |
|
|
|
| 619 |
|
|
|
| 620 |
|
|
/* SPI1 Controller (0xFFC03400 - 0xFFC034FF)*/
|
| 621 |
|
|
#define pSPI1_CTL ((volatile unsigned short *)SPI1_CTL)
|
| 622 |
|
|
#define pSPI1_FLG ((volatile unsigned short *)SPI1_FLG)
|
| 623 |
|
|
#define pSPI1_STAT ((volatile unsigned short *)SPI1_STAT)
|
| 624 |
|
|
#define pSPI1_TDBR ((volatile unsigned short *)SPI1_TDBR)
|
| 625 |
|
|
#define pSPI1_RDBR ((volatile unsigned short *)SPI1_RDBR)
|
| 626 |
|
|
#define pSPI1_BAUD ((volatile unsigned short *)SPI1_BAUD)
|
| 627 |
|
|
#define pSPI1_SHADOW ((volatile unsigned short *)SPI1_SHADOW)
|
| 628 |
|
|
|
| 629 |
|
|
|
| 630 |
|
|
/* Counter Registers (0xFFC03500 - 0xFFC035FF)*/
|
| 631 |
|
|
#define pCNT_CONFIG ((volatile unsigned short *)CNT_CONFIG)
|
| 632 |
|
|
#define pCNT_IMASK ((volatile unsigned short *)CNT_IMASK)
|
| 633 |
|
|
#define pCNT_STATUS ((volatile unsigned short *)CNT_STATUS)
|
| 634 |
|
|
#define pCNT_COMMAND ((volatile unsigned short *)CNT_COMMAND)
|
| 635 |
|
|
#define pCNT_DEBOUNCE ((volatile unsigned short *)CNT_DEBOUNCE)
|
| 636 |
|
|
#define pCNT_COUNTER ((volatile unsigned long *)CNT_COUNTER)
|
| 637 |
|
|
#define pCNT_MAX ((volatile unsigned long *)CNT_MAX)
|
| 638 |
|
|
#define pCNT_MIN ((volatile unsigned long *)CNT_MIN)
|
| 639 |
|
|
|
| 640 |
|
|
|
| 641 |
|
|
/* OTP Registers (0xFFC03600 - 0xFFC036FF) */
|
| 642 |
|
|
/* Security Registers */
|
| 643 |
|
|
#define pSECURE_SYSSWT ((volatile unsigned long *)SECURE_SYSSWT)
|
| 644 |
|
|
#define pSECURE_CONTROL ((volatile unsigned short *)SECURE_CONTROL)
|
| 645 |
|
|
#define pSECURE_STATUS ((volatile unsigned short *)SECURE_STATUS)
|
| 646 |
|
|
|
| 647 |
|
|
/* OTP Read/Write Data Buffer Registers */
|
| 648 |
|
|
#define pOTP_DATA0 ((volatile unsigned long *)OTP_DATA0)
|
| 649 |
|
|
#define pOTP_DATA1 ((volatile unsigned long *)OTP_DATA1)
|
| 650 |
|
|
#define pOTP_DATA2 ((volatile unsigned long *)OTP_DATA2)
|
| 651 |
|
|
#define pOTP_DATA3 ((volatile unsigned long *)OTP_DATA3)
|
| 652 |
|
|
|
| 653 |
|
|
|
| 654 |
|
|
/* PWM 3PHASE (0xFFC03700 - 0xFFC037FF)*/
|
| 655 |
|
|
#define pPWM_CTRL ((volatile unsigned short *)PWM_CTRL)
|
| 656 |
|
|
#define pPWM_STAT ((volatile unsigned short *)PWM_STAT)
|
| 657 |
|
|
#define pPWM_TM ((volatile unsigned short *)PWM_TM)
|
| 658 |
|
|
#define pPWM_DT ((volatile unsigned short *)PWM_DT)
|
| 659 |
|
|
#define pPWM_GATE ((volatile unsigned short *)PWM_GATE)
|
| 660 |
|
|
#define pPWM_CHA ((volatile unsigned short *)PWM_CHA)
|
| 661 |
|
|
#define pPWM_CHB ((volatile unsigned short *)PWM_CHB)
|
| 662 |
|
|
#define pPWM_CHC ((volatile unsigned short *)PWM_CHC)
|
| 663 |
|
|
#define pPWM_SEG ((volatile unsigned short *)PWM_SEG)
|
| 664 |
|
|
#define pPWM_SYNCWT ((volatile unsigned short *)PWM_SYNCWT)
|
| 665 |
|
|
#define pPWM_CHAL ((volatile unsigned short *)PWM_CHAL)
|
| 666 |
|
|
#define pPWM_CHBL ((volatile unsigned short *)PWM_CHBL)
|
| 667 |
|
|
#define pPWM_CHCL ((volatile unsigned short *)PWM_CHCL)
|
| 668 |
|
|
#define pPWM_LSI ((volatile unsigned short *)PWM_LSI)
|
| 669 |
|
|
#define pPWM_STAT2 ((volatile unsigned short *)PWM_STAT2)
|
| 670 |
|
|
|
| 671 |
|
|
#ifdef _MISRA_RULES
|
| 672 |
|
|
#pragma diag(pop)
|
| 673 |
|
|
#endif /* _MISRA_RULES */
|
| 674 |
|
|
|
| 675 |
|
|
|
| 676 |
|
|
#endif /*_CDEF_BF51X_H*/
|
