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[/] [openrisc/] [tags/] [gnu-src/] [newlib-1.18.0/] [newlib-1.18.0-or32-1.0rc1/] [newlib/] [libc/] [machine/] [arm/] [arm_asm.h] - Blame information for rev 345

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Line No. Rev Author Line
1 207 jeremybenn
/*
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 * Copyright (c) 2009 ARM Ltd
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 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 * 1. Redistributions of source code must retain the above copyright
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 *    notice, this list of conditions and the following disclaimer.
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 * 2. Redistributions in binary form must reproduce the above copyright
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 *    notice, this list of conditions and the following disclaimer in the
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 *    documentation and/or other materials provided with the distribution.
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 * 3. The name of the company may not be used to endorse or promote
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 *    products derived from this software without specific prior written
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 *    permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
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 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
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 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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#ifndef ARM_ASM__H
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#define ARM_ASM__H
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/* First define some macros that keep everything else sane.  */
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#if defined (__ARM_ARCH_7A__) || defined (__ARM_ARCH_7R__)
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#define _ISA_ARM_7
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#endif
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#if defined (_ISA_ARM_7) || defined (__ARM_ARCH_6__) || \
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    defined (__ARM_ARCH_6J__) || defined (__ARM_ARCH_6T2__) || \
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    defined (__ARM_ARCH_6K__) || defined (__ARM_ARCH_6ZK__) || \
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    defined (__ARM_ARCH_6Z__)
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#define _ISA_ARM_6
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#endif
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#if defined (_ISA_ARM_6) || defined (__ARM_ARCH_5__) || \
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    defined (__ARM_ARCH_5T__) || defined (__ARM_ARCH_5TE__) || \
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    defined (__ARM_ARCH_5TEJ__)
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#define _ISA_ARM_5
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#endif
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#if defined (_ISA_ARM_5) || defined (__ARM_ARCH_4T__)
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#define _ISA_ARM_4T
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#endif
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#if defined (__ARM_ARCH_7M__) || defined (__ARM_ARCH_7__)
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#define _ISA_THUMB_2
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#endif
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#if defined (_ISA_THUMB_2) || defined (__ARM_ARCH_6M__)
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#define _ISA_THUMB_1
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#endif
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/* Now some macros for common instruction sequences.  */
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asm(".macro  RETURN     cond=\n\t"
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#if defined (_ISA_ARM_4T) || defined (_ISA_THUMB_1)
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    "bx\\cond   lr\n\t"
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#else
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    "mov\\cond  pc, lr\n\t"
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#endif
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    ".endm"
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    );
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asm(".macro optpld      base, offset=#0\n\t"
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#if defined (_ISA_ARM_7)
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    "pld        [\\base, \\offset]\n\t"
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#endif
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    ".endm"
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    );
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#endif /* ARM_ASM__H */

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